Design of ALU and Cache Memory for an 8 bit ALU

The design of an ALU and a Cache memory for use in a high performance processor was examined in this thesis. Advanced architectures employing increased parallelism were analyzed to minimize the number of execution cycles needed for 8 bit integer arithmetic operations. In addition to the arithmetic unit, an optimized SRAM memory cell was designed to be used as cache memory and as fast Look Up Table. The ALU consists of stand alone units for bit parallel computation of basic integer arithmetic operations. Addition and subtraction were performed using Kogge Stone parallel prefix hardware operating at 330MHz. A high performance multiplier was built using Radix 4 Modified Booth Encoder (MBE) and a Wallace Tree summation array. The multiplier requires single clock cycle for 8 bit integer multiplication and operates at a maximum frequency of 100MHz. Multiplicative division hardware was built for executing both integer division and square root. The division hardware computes 8-bit division and square root in 4 clock cycles. Multiplier forms the basic building block of all these functional units, making high level of resource sharing feasible with this architecture. The optimal operating frequency for the arithmetic unit is 70MHz. A 6T CMOS SRAM cell measuring 90 µm2 was designed using minimum size transistors. The layout allows for horizontal overlap resulting in effective area of 76 µm2 for an 8x8 array. By substituting equivalent bit line capacitance of P4 L1 Cache, the memory was simulated to have a read time of 3.27ns. An optimized set of test vectors were identified to enable high fault coverage without the need for any additional test circuitry. Sixteen test cases were identified that would toggle all the nodes and provide all possible inputs to the sub units of the multiplier. A correlation based semi automatic method was investigated to facilitate test case identification for large multipliers. This method of testability eliminates performance and area overhead associated with conventional testability hardware. Bottom up design methodology was employed for the design. The performance and area metrics are presented along with estimated power consumption. A set of Monte Carlo analysis was carried out to ensure the dependability of the design under process variations as well as fluctuations in operating conditions. The arithmetic unit was found to require a total die area of 2mm2 (approx.) in 0.35 micron process

Characterization and Implementation of a Real-World Target Tracking Algorithm on Field Programmable Gate Arrays with Kalman Filter Test Case

A one dimensional Kalman Filter algorithm provided in Matlab is used as the basis for a Very High Speed Integrated Circuit Hardware Description Language (VHDL) model. The JAVA programming language is used to create the VHDL code that describes the Kalman filter in hardware which allows for maximum flexibility. A one-dimensional behavioral model of the Kalman Filter is described, as well as a one-dimensional and synthesizable register transfer level (RTL) model with optimizations for speed, area, and power. These optimizations are achieved by a focus on parallelization as well as careful Kalman filter sub-module algorithm selection. Newton-Raphson reciprocal is the chosen algorithm for a fundamental aspect of the Kalman filter, which allows efficient high-speed computation of reciprocals within the overall system. The Newton-Raphson method is also expanded for use in calculating square-roots in an optimized and synthesizable two-dimensional VHDL implementation of the Kalman filter. The two-dimensional Kalman filter expands on the one-dimensional implementation allowing for the tracking of targets on a real-world Cartesian coordinate system

Correlation of materials properties with the atomic density concept

Based on the hypothesis that the number of atoms per unit volume, accurately calculable for any substance of known real density and chemical composition, various characterizing parameters (energy levels of electrons interacting among atoms of the same or different kinds, atomic mass, bond intensity) were chosen for study. A multiple exponential equation was derived to express the relationship. Various properties were examined, and correlated with the various parameters. Some of the properties considered were: (1) heat of atomization, (2) boiling point, (3) melting point, (4) shear elastic modulus of cubic crystals, (5) thermal conductivity, and (6) refractive index for transparent substances. The solid elements and alkali halides were the materials studied. It is concluded that the number of different properties can quantitively be described by a common group of parameters for the solid elements, and a wide variety of compounds

Machine division

Techniques are generally described that include methods, devices, systems and/or apparatus for dividing a numerator by a denominator. Some example methods may include selecting a first numerical factor stored in an electronic storage media. The first numerical factor may be multiplied by a numerator at least in part using a first logic circuit configured to perform multiplication. The first numerical factor may also be multiplied by a denominator. A second numerical factor may be calculated based, at least in part, on an approximation of a square of the difference between unity and the product of the first numerical factor and the denominator. The second numerical factor may be multiplied by the product of the numerator and the first numerical factor at least in part using the first logic circuit, to generate an approximation of a quotient of the numerator and the denominator.Board of Regents, University of Texas Syste

Design of a Single Precision Floating Point Divider and Multiplier with Pipelined Architecture

High speed computation is the need of today’s generation of Processors. To accomplish this major task, many functions are implemented inside the hardware of the processor rather than having software computing the same task. Majority of the operations which the processor executes are Arithmetic operations which are widely used in many applications that require heavy mathematical operations such as scientific calculations, image and signal processing. Especially in the field of signal processing, multiplication division operation is widely used in many applications. The major issue with these operations in hardware is that many iteration’s are required which results in slow operation while fast algorithms require complex computations within each cycle. The result of a Division operation results in a either in Quotient and Remainder or a Floating point number which is the major reason to make it more complex than Multiplication operation. The work described in this paper includes design and verification of a floating point divider and multiplier. The inputs of both the Multiplier and Divider and also the output are designed using the single precision IEEE Standard for floating point numbers

Patina: a Method Oriented Design Environment for Parametric Analysis

The central issue to be addressed in this thesis is the provision of support for design tasks that require problem formation and evaluation and some inventive adaptation of products and design strategies. Hitherto, computer tools have failed to support the full range of design tasks. In particular, they have been focused upon solving previously formulated design tasks in well-defined domains where little inventiveness with materials or design strategies is required (Green, 1992a). A solution is offered in the form of an analysis that yields a new class of system, called Method Oriented Design Environments (MODEs), which provide support for some of these more complicated design tasks. An implementation of such a system is presented in the fom1 of Patina: a MODE to support parametric analysis. It is argued that the lack of support for design tasks involving problem formulation, evaluation and inventiveness with components and strategies has partly been due to usage of an overly narrow view of the design process as a basis for system development on the part of developers of knowledge aided design. To provide a more complete orientation for these developers, and 'to expand the theory of knowledge aided design, an alternative model of design tasks is developed in the form of a 'design activity space' by transferring knowledge from the field of design research to that of knowledge aided design. A mapping is constructed between this new design activity space and Green's model space of tools for knowledge aided design (Green, 1992a). The mapping is first used to analyse the range of utility of some recent alternatives to traditional knowledge based systems for design. It is then used to single out a 'niche' of design tasks that are not supported by traditional systems or their more recent alternatives. The design tasks which lie in this niche awaiting support from computer tools share the following characteristics: ( 1) they encompass the activities of analysis, synthesis and evaluation, (2) they require an intermediate degree of innovation with the product, and (3) they require an intermediate degree of innovation in design strategy. The class of tools that are proposed to offer support to tasks in this niche are named MODEs because their defining characteristic is that the majority of their constituent knowledge is derived from a design method or strategy. Therefore the main item that is being represented to the user of a MODE is such a structured method rather than an evolving artefact. This is radically different from the traditional knowledge based tools, where the item being represented is an artefact in a particular domain, and from a recent proposal for systems that depict an unstructured process (Blessing, 1994). To demonstrate the feasibility of implementing a MODE, the implementation of a system called Patina, to support designers in applying the technique of parametric analysis, is reported

Handbook of Mathematical Geosciences

This Open Access handbook published at the IAMG's 50th anniversary, presents a compilation of invited path-breaking research contributions by award-winning geoscientists who have been instrumental in shaping the IAMG. It contains 45 chapters that are categorized broadly into five parts (i) theory, (ii) general applications, (iii) exploration and resource estimation, (iv) reviews, and (v) reminiscences covering related topics like mathematical geosciences, mathematical morphology, geostatistics, fractals and multifractals, spatial statistics, multipoint geostatistics, compositional data analysis, informatics, geocomputation, numerical methods, and chaos theory in the geosciences