CSP methods for identifying atomic actions in the design of fault tolerant concurrent systems

Limiting the extent of error propagation when faults occur and localizing the subsequent error recovery are common concerns in the design of fault tolerant parallel processing systems, Both activities are made easier if the designer associates fault tolerance mechanisms with the underlying atomic actions of the system, With this in mind, this paper has investigated two methods for the identification of atomic actions in parallel processing systems described using CSP, Explicit trace evaluation forms the basis of the first algorithm, which enables a designer to analyze interprocess communications and thereby locate atomic action boundaries in a hierarchical fashion, The second method takes CSP descriptions of the parallel processes and uses structural arguments to infer the atomic action boundaries. This method avoids the difficulties involved with producing full trace sets, but does incur the penalty of a more complex algorithm

MINIMAL CUT SETS IDENTIFICATION OF NUCLEAR SYSTEMS BY EVOLUTIONARY ALGORITHMS

Fault Trees (FTs) for the Probabilistic Safety Analysis (PSA) of real systems suffer from the combinatorial explosion of failure sets. Then, minimal cut sets (mcs) identification is not a trivial technical issue. In this work, we transform the search of the event sets leading to system failure and the identification of the mcs into an optimization problem. We do so by hierarchically looking for the minimum combination of cut sets that can guarantee the best coverage of all the minterms that make the system fail. A multiple-population, parallel search policy based on a Differential Evolution (DE) algorithm is developed and shown to be efficient for mcs identification, on a case study considering the Airlock System (AS) of CANDU reactor

New Algorithms for Locating Faults in Series Capacitive Compensated Transmission Lines

The precise location of the fault in a series capacitive compensated transmission line (SCCTL) plays an integral part in limiting the maintenance time following its tripping due to the occurrence of a permanent fault. Since, an SCCTL acts as a huge corridor of power, its outage will result in huge monetary losses which are directly proportion to the time it remains out of service. In worst case scenario, the tripping of an SCCTL might lead to the cascaded tripping of the parallel transmission lines due to overloading. Therefore, the need for an accurate and robust fault location algorithm for the SCCTLs becomes critical. Consequently, the focus of this thesis is to develop new fault location algorithms for the SCCTLs. First of all, the concept of fault location in conventional transmission lines and its application to SCCTLs has been explained. The mathematical analysis of impedance-based fault location algorithms for SCCTLs which are the most widely used fault location algorithms for SCCTLs, is performed. The mathematical analysis enables a deeper look into the strengths and deficiencies of the existing algorithms. After the identification of the innate limitations of the existing fault location algorithms, three new impedance-based fault location algorithms have been proposed with the aim of maximum utilization of the available measurements to improve the accuracy of the fault location results in SCCTLs. The proposed impedance-based algorithms are then tested for various fault scenarios using simulations carried out in Matlab, and PSCAD. The comparative analysis of the proposed algorithms with the existing algorithms is also performed. The interest in traveling wave-based fault location algorithms has been renewed lately due to the availability of commercial relays capable of sampling in the range of 1 MHz. Therefore, the traveling wave theory which forms the basis of traveling wave-based fault location algorithms is discussed. The mathematical analysis of reflection, and transmission of the traveling waves from various points of discontinuity in an SCCTL has been performed which enables the understanding of the shortcomings of the existing fault location algorithms. Thereafter, a new single-ended traveling wave-based fault location algorithm has been proposed in this thesis. The performance of the proposed algorithm has been verified through the simulations carried out in PSCAD

AI and OR in management of operations: history and trends

The last decade has seen a considerable growth in the use of Artificial Intelligence (AI) for operations management with the aim of finding solutions to problems that are increasing in complexity and scale. This paper begins by setting the context for the survey through a historical perspective of OR and AI. An extensive survey of applications of AI techniques for operations management, covering a total of over 1200 papers published from 1995 to 2004 is then presented. The survey utilizes Elsevier's ScienceDirect database as a source. Hence, the survey may not cover all the relevant journals but includes a sufficiently wide range of publications to make it representative of the research in the field. The papers are categorized into four areas of operations management: (a) design, (b) scheduling, (c) process planning and control and (d) quality, maintenance and fault diagnosis. Each of the four areas is categorized in terms of the AI techniques used: genetic algorithms, case-based reasoning, knowledge-based systems, fuzzy logic and hybrid techniques. The trends over the last decade are identified, discussed with respect to expected trends and directions for future work suggested

On the reliability of electrical drives for safety-critical applications

The aim of this work is to present some issues related to fault tolerant electric drives,which are able to overcome different types of faults occurring in the sensors, in thepower converter and in the electrical machine, without compromising the overallfunctionality of the system. These features are of utmost importance in safety-criticalapplications. In this paper, the reliability of both commercial and innovative driveconfigurations, which use redundant hardware and suitable control algorithms, will beinvestigated for the most common types of fault: besides standard three phase motordrives, also multiphase topologies, open-end winding solutions, multi-machineconfigurations will be analyzed, applied to various electric motor technologies. Thecomplexity of hardware and control strategies will also be compared in this paper, sincethis has a tremendous impact on the investment costs

Time-efficient fault detection and diagnosis system for analog circuits

Time-efficient fault analysis and diagnosis of analog circuits are the most important prerequisites to achieve online health monitoring of electronic equipments, which are involving continuing challenges of ultra-large-scale integration, component tolerance, limited test points but multiple faults. This work reports an FPGA (field programmable gate array)-based analog fault diagnostic system by applying two-dimensional information fusion, two-port network analysis and interval math theory. The proposed system has three advantages over traditional ones. First, it possesses high processing speed and smart circuit size as the embedded algorithms execute parallel on FPGA. Second, the hardware structure has a good compatibility with other diagnostic algorithms. Third, the equipped Ethernet interface enhances its flexibility for remote monitoring and controlling. The experimental results obtained from two realistic example circuits indicate that the proposed methodology had yielded competitive performance in both diagnosis accuracy and time-effectiveness, with about 96% accuracy while within 60 ms computational time.Peer reviewedFinal Published versio