2 research outputs found

    A Parallel, Energy Efficient Hardware Architecture for the merAligner on FPGA Using Chisel HCL

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    none6noneDi Tucci, Lorenzo; Conficconi, Davide; Comodi, Alessandro; Hofmeyr, Steven; Donofrio, David; Santambrogio, Marco D.Di Tucci, Lorenzo; Conficconi, Davide; Comodi, Alessandro; Hofmeyr, Steven; Donofrio, David; Santambrogio, Marco D
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