2 research outputs found
A Parallel, Energy Efficient Hardware Architecture for the merAligner on FPGA Using Chisel HCL
none6noneDi Tucci, Lorenzo; Conficconi, Davide; Comodi, Alessandro; Hofmeyr, Steven; Donofrio, David; Santambrogio, Marco D.Di Tucci, Lorenzo; Conficconi, Davide; Comodi, Alessandro; Hofmeyr, Steven; Donofrio, David; Santambrogio, Marco D