Approximation schemes for minimizing total (weighted) completion time with release dates on a batch machine

2005-2006 > Academic research: refereed > Publication in refereed journalAccepted ManuscriptPublishe

Scheduling of Batch Processors in Semiconductor Manufacturing – A Review

In this paper a review on scheduling of batch processors (SBP) in semiconductor manufacturing (SM) is presented. It classifies SBP in SM into 12 groups. The suggested classification scheme organizes the SBP in SM literature, summarizes the current research results for different problem types. The classification results are presented based on various distributions and various methodologies applied for SBP in SM are briefly highlighted. A comprehensive list of references is presented. It is hoped that, this review will provide a source for other researchers/readers interested in SBP in SM research and help simulate further interest.Singapore-MIT Alliance (SMA

The bounded single-machine parallel-batching scheduling problem with family jobs and release dates to minimize makespan

Author name used in this publication: C. T. NgAuthor name used in this publication: T. C. E. Cheng2007-2008 > Academic research: refereed > Publication in refereed journalAccepted ManuscriptPublishe

The unbounded single machine parallel batch scheduling problem with family jobs and release dates to minimize makespan

Author name used in this publication: Z. H. LiuAuthor name used in this publication: T. C. E. Cheng2003-2004 > Academic research: refereed > Publication in refereed journalAccepted ManuscriptPublishe

Algorithms and complexity analyses for some combinational optimization problems

The main focus of this dissertation is on classical combinatorial optimization problems in two important areas: scheduling and network design. In the area of scheduling, the main interest is in problems in the master-slave model. In this model, each machine is either a master machine or a slave machine. Each job is associated with a preprocessing task, a slave task and a postprocessing task that must be executed in this order. Each slave task has a dedicated slave machine. All the preprocessing and postprocessing tasks share a single master machine or the same set of master machines. A job may also have an arbitrary release time before which the preprocessing task is not available to be processed. The main objective in this dissertation is to minimize the total completion time or the makespan. Both the complexity and algorithmic issues of these problems are considered. It is shown that the problem of minimizing the total completion time is strongly NP-hard even under severe constraints. Various efficient algorithms are designed to minimize the total completion time under various scenarios. In the area of network design, the survivable network design problems are studied first. The input for this problem is an undirected graph G = (V, E), a non-negative cost for each edge, and a nonnegative connectivity requirement ruv for every (unordered) pair of vertices &ruv. The goal is to find a minimum-cost subgraph in which each pair of vertices u,v is joined by at least ruv edge (vertex)-disjoint paths. A Polynomial Time Approximation Scheme (PTAS) is designed for the problem when the graph is Euclidean and the connectivity requirement of any point is at most 2. PTASs or Quasi-PTASs are also designed for 2-edge-connectivity problem and biconnectivity problem and their variations in unweighted or weighted planar graphs. Next, the problem of constructing geometric fault-tolerant spanners with low cost and bounded maximum degree is considered. The first result shows that there is a greedy algorithm which constructs fault-tolerant spanners having asymptotically optimal bounds for both the maximum degree and the total cost at the same time. Then an efficient algorithm is developed which finds fault-tolerant spanners with asymptotically optimal bound for the maximum degree and almost optimal bound for the total cost

Batch Scheduling with Proportional-Linear Deterioration and Outsourcing

We consider the bounded parallel-batch scheduling with proportional-linear deterioration and outsourcing, in which the actual processing time is pj=αj(A+Dt) or pj=αjt. A job is either accepted and processed in batches on a single machine by manufactures themselves or outsourced to the third party with a certain penalty having to be paid. The objective is to minimize the maximum completion time of the accepted jobs and the total penalty of the outsourced jobs. For the pj=αj(A+Dt) model, when all the jobs are released at time zero, we show that the problem is NP-hard and present a pseudo-polynomial time algorithm, respectively. For the pj=αjt model, when the jobs have distinct m (<n) release dates, we provide a dynamic programming algorithm, where n is the number of jobs

Reliability Analysis of Nanocrystal Embedded High-k Nonvolatile Memories

The evolution of the MOSFET technology has been driven by the aggressive shrinkage of the device size to improve the device performance and to increase the circuit density. Currently, many research demonstrated that the continuous polycrystalline silicon film in the floating-gate dielectric could be replaced with nanocrystal (nc) embedded high-k thin film to minimize the charge loss due to the defective thin tunnel dielectric layer. This research deals with both the statistical aspect of reliability and electrical aspect of reliability characterization as well. In this study, the Zr-doped HfO2 (ZrHfO) high-k MOS capacitors, which separately contain the nanocrystalline zinc oxide (nc-ZnO), silicon (nc-Si), Indium Tin Oxide (nc-ITO) and ruthenium (nc-Ru) are studied on their memory properties, charge transportation mechanism, ramp-relax test, accelerated life tests, failure rate estimation and thermal effect on the above reliability properties. C-V hysteresis result show that the amount of charges trapped in nanocrystal embedded films is in the order of nc-ZnO\u3enc-Ru\u3enc-Si~nc-ITO, which might probably be influenced by the EOT of each sample. In addition, all the results show that the nc-ZnO embedded ZrHfO non-volatile memory capacitor has the best memory property and reliability. In this study, the optimal burn-in time for this kind of device has been also investigated with nonparametric Bayesian analysis. The results show the optimal burn-in period for nc-ZnO embedded high-k device is 5470s with the maximum one-year mission reliability

Scheduling hybrid flowshop with parallel batching machines and compatibilities.

International audienceThis paper considers a two-stage hybrid flowshop problem in which the first stage contains several identical discrete machines, and the second stage contains several identical batching machines. Each discrete machine can process no more than one task at time, and each batching machine can process several tasks simultaneously in a batch with the additional feature that the tasks of the same batch have to be compatible. A compatibility relation is defined between each pair of tasks, so that an undirected compatibility graph is obtained which turns out to be an interval graph. The batch processing time is equal to the maximal processing time of the tasks in this batch, and all tasks of the same batch start and finish together. The goal is to make batching and sequencing decisions in order to minimize the makespan. Since the problem is NP-hard, we develop several heuristics along with their worst cases analysis. We also consider the case in which tasks have the same processing time on the first stage, for which a polynomial time approximation scheme (PTAS) algorithm is presented