Innovative teaching of IC design and manufacture using the Superchip platform

In this paper we describe how an intelligent chip architecture has allowed a large cohort of undergraduate students to be given effective practical insight into IC design by designing and manufacturing their own ICs. To achieve this, an efficient chip architecture, the “Superchip”, has been developed, which allows multiple student designs to be fabricated on a single IC, and encapsulated in a standard package without excessive cost in terms of time or resources. We demonstrate how the practical process has been tightly coupled with theoretical aspects of the degree course and how transferable skills are incorporated into the design exercise. Furthermore, the students are introduced at an early stage to the key concepts of team working, exposure to real deadlines and collaborative report writing. This paper provides details of the teaching rationale, design exercise overview, design process, chip architecture and test regime

Designing of Flexible Multi-Microcontroller Based Training System

In traditional Embedded Control Technology courses, students learn to develop assembly language programs to control peripherals, handle interrupts, and perform I/O operations. However, students find the subject is difficult as the subject is presented in a lecture format. Unfortunately, this Embedded Controller Technology (ECT) course is a compulsory course in any electrical or electronic field of engineering. This paper aims to describe development of a flexible multi-microcontroller training system based on 8-bit microcontroller in Microchip, Freescale (formerly Motorola) and Intel family. For this reason, a new laboratory evaluation tool (UMP-EVT) specifically will be designed to be as a learning tool for those who intend to learn microcontroller and for use in the academic environment. With an extensive of this training system, it could let the user to get start with their microcontroller application efficiently. In addition, it is further boosted by the introduction of Integrated Development Environment (IDE) features in order to create user-friendly environment. By using this UMP-EVT, users are exposed to practical experience of the microcontroller and provide an easy path to learn this intelligent electronic device in short time. In this respect, this UMP-EVT would be applicable for education and expose the electrical engineering students to the understanding fundamental of microcontroller in electronic design field

Fast structured design of VLSI circuits

technical reportWe believe that a structured, user-friendly, cost-effective tool for rapid implementation of VLSI circuits which encourages students to participate directly in research projects are the key components in digital integrated circuit (IC) education. In this paper, we introduce our VLSI education activities, with t h e emphasis on t h e presentation of Path Programmable Logic (PPL) design methodology, in addition to a short description of a representative student project. Students using PPL are able to implement MOS or GaAs VLSI circuits with several thousands to over 100,000 transistors in a few weeks. They have designed and built numerous VLSI architectures and computer systems which play an influential role in various research areas. Our educational activities and the Utah Annual Student VLSI Design Contest supported by over a dozen leading American firms have attracted multiple university involvement in recent years

Teaching and learning Operational Amplifiers using a reconfigurable and expandable kit

Operational Amplifiers (OpAmps) are one of the most important integrated circuits in the area of electronics. These type of devices are widely adopted in the area since they allow the design of simple and/or complex analogue circuits without many efforts. It is therefore fundamental to create innovative educational solutions to facilitate their teaching and learning, and in particular the inclusion of more experimental work in a course curricula. For this purpose, it was designed and implemented a reconfigurable and expandable kit to teach and learn electronic circuits based on the OpAmp uA741. The kit comprises a software application and a hardware platform. The software application allows the simulation and the reconfiguration of real electronic circuits based on the OpAmp uA741 included in the hardware platform. For measuring and/or applying signals to a particular reconfigured circuit, users may establish automatic connections. In this paper it is described the features and functionalities provided by the kit, and an overview about the OpAmp uA741. At the end, some teachers’ opinions about their perceptions concerning a possible adoption of the kit in a real educational scenario are presented.N/

Analog and Digital PC Oscilloscope

This Final Year Project is about designing an Analog and Digital PC Oscilloscope. To realize this, software has to be design that has the capability of acting as an oscilloscope that can be installed in normal PC. The main focus of this project is to display the waveform of digital and analogue signal. The software that been used for this project was Visual Basic software. Oscilloscope is very useful in determining the response of an electric circuit in terms of finding the signal response. But sometimes for a small / mini project, one did not really need to get or buy an oscilloscope to see the response ofthe circuit. Since majority of students / people have their own PC, it is very useful to have a program that can turn the PC to an oscilloscope. Hopefully, the design of this PC Oscilloscope will assist students in their learning environment to be a better learner especially in the electronic engineering area

An Alternative Way of Teaching Operational Amplifiers Using a Reconfigurable and Expandable Kit

Early on, students must develop competences by implementing simple or complex electronic circuits with Operational Amplifiers (OpAmps). Traditionally, these skills were mainly developed in laboratory classes, but technology allows us to explore other and complementary ways of aiding students in this achievement. This paper presents a contribution to improve the way OpAmps are included in electronic engineering courses’ curricula. A reconfigurable and expandable kit to teach electronic circuits based on the OpAmp uA741 was designed and implemented. This kit comprises a software application locally interfaced with a hardware platform capable of running in a PC. This platform includes a circuit with the OpAmp uA741 able to reconfigure according to a set of parameters defined by a software application. Its reconfiguration capability also enables the establishment of automatic connections for measuring and for applying signals to a reconfigured circuit, plus the ability to simulate the same or other OpAmp-based circuits. This paper provides an overview about the OpAmp uA741 and its relevance in engineering education. After presenting the kit and make some considerations for its improvement, at the end a brief discussion about its implementation in education according to specific educational strategies and methodologies are provided.This work was supported in part by the Fundação para a Ciência e Tecnologia under Grant FCT-UID-EQU-04730-2013info:eu-repo/semantics/publishedVersio

Design considerations of a nonvolatile accumulator-based 8-bit processor

The rise of the Internet of Things (IoT) and theconstant growth of portable electronics have leveraged the con-cern with energy consumption. Nonvolatile memory (NVM)emerged as a solution to mitigate the problem due to its abilityto retain data on sleep mode without a power supply. Non-volatile processors (NVPs) may further improve energy savingby using nonvolatile flip-flops (NVFFs) to store system state,allowing the device to be turned off when idle and resume ex-ecution instantly after power-on. In view of the potential pre-sented by NVPs, this work describes the initial steps to imple-ment a nonvolatile version of Neander, a hypothetical processorcreated for educational purposes. First, we implemented Ne-ander in Register Transfer Level (RTL), separating the com-binational logic from the sequential elements. Then, the lat-ter was replaced by circuit-level descriptions of volatile flip-flops. We then validated this implementation by employinga mixed-signal simulation over a set of benchmarks. Resultshave shown the expected behavior for the whole instructionset. Then, we implemented circuit-level descriptions of mag-netic tunnel junction (MTJ) based nonvolatile flip-flops, usingan open-source MTJ model. These elements were exhaustivelyvalidated using electrical simulations. With these results, weintend to carry on the implementation and fully equip our pro-cessor with nonvolatile features such as instant wake-up

The first version Buffered Large Analog Bandwidth (BLAB1) ASIC for high luminosity collider and extensive radio neutrino detectors

Future detectors for high luminosity particle identification and ultra high energy neutrino observation would benefit from a digitizer capable of recording sensor elements with high analog bandwidth and large record depth, in a cost-effective, compact and low-power way. A first version of the Buffered Large Analog Bandwidth (BLAB1) ASIC has been designed based upon the lessons learned from the development of the Large Analog Bandwidth Recorder and Digitizer with Ordered Readout (LABRADOR) ASIC. While this LABRADOR ASIC has been very successful and forms the basis of a generation of new, large-scale radio neutrino detectors, its limited sampling depth is a major drawback. A prototype has been designed and fabricated with 65k deep sampling at multi-GSa/s operation. We present test results and directions for future evolution of this sampling technique.Comment: 15 pages, 26 figures; revised, accepted for publication in NIM

A Low Cost Concept for Data Acquisition Systems Applied to Decentralized Renewable Energy Plants

The present paper describes experiences of the use of monitoring and data acquisition systems (DAS) and proposes a new concept of a low cost DAS applied to decentralized renewable energy (RE) plants with an USB interface. The use of such systems contributes to disseminate these plants, recognizing in real time local energy resources, monitoring energy conversion efficiency and sending information concerning failures. These aspects are important, mainly for developing countries, where decentralized power plants based on renewable sources are in some cases the best option for supplying electricity to rural areas. Nevertheless, the cost of commercial DAS is still a barrier for a greater dissemination of such systems in developing countries. The proposed USB based DAS presents a new dual clock operation philosophy, in which the acquisition system contains two clock sources for parallel information processing from different communication protocols. To ensure the low cost of the DAS and to promote the dissemination of this technology in developing countries, the proposed data acquisition firmware and the software for USB microcontrollers programming is a free and open source software, executable in the Linux and Windows® operating systems

Demonstration of fully integrated parity-time-symmetric electronics

Harnessing parity-time (PT) symmetry with balanced gain and loss profiles has created a variety of opportunities in electronics from wireless energy transfer to telemetry sensing and topological defect engineering. However, existing implementations often employ ad-hoc approaches at low operating frequencies and are unable to accommodate large-scale integration. Here, we report a fully integrated realization of PT-symmetry in a standard complementary metal-oxide-semiconductor technology. Our work demonstrates salient PT-symmetry features such as phase transition as well as the ability to manipulate broadband microwave generation and propagation beyond the limitations encountered by exiting schemes. The system shows 2.1 times bandwidth and 30 percentage noise reduction compared to conventional microwave generation in oscillatory mode and displays large non-reciprocal microwave transport from 2.75 to 3.10 gigahertz in non-oscillatory mode due to enhanced nonlinearities. This approach could enrich integrated circuit (IC) design methodology beyond well-established performance limits and enable the use of scalable IC technology to study topological effects in high-dimensional non-Hermitian systems.Comment: 52 pages (16 pages Main Text, 28 pages Supplementary Materials, 4 pages reference), 27 figures (4 figures Main Text, 23 figures Supplementary Materials), 93 references (50 references Main Text, 43 references Supplementary Materials