30,404 research outputs found

    A Novel and Practical Control Scheme for Inter-Clock At-Speed Testing

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    The quality of at-speed testing is being severely challenged by the problem that an inter-clock logic block existing between two synchronous clocks is not efficiently tested or totally ignored due to complex test control. This paper addresses the problem with a novel inter-clock at-speed test control scheme, featuring a compact and robust on-chip inter-clock enable generator design. The new scheme can generate inter-clock at-speed test clocks from PLLs, and is feasible for both ATE-based scan testing and logic BIST. Successful applications to industrial circuits have proven its effectiveness in improving the quality of at-speed testing.2006 IEEE International Test Conference, 22-27 October 2006, Santa Clara, CA, US

    Advanced modulation technology development for earth station demodulator applications

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    The purpose of this contract was to develop a high rate (200 Mbps), bandwidth efficient, modulation format using low cost hardware, in 1990's technology. The modulation format chosen is 16-ary continuous phase frequency shift keying (CPFSK). The implementation of the modulation format uses a unique combination of a limiter/discriminator followed by an accumulator to determine transmitted phase. An important feature of the modulation scheme is the way coding is applied to efficiently gain back the performance lost by the close spacing of the phase points

    Barrel Shifter Physical Unclonable Function Based Encryption

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    Physical Unclonable Functions (PUFs) are circuits designed to extract physical randomness from the underlying circuit. This randomness depends on the manufacturing process. It differs for each device enabling chip-level authentication and key generation applications. We present a protocol utilizing a PUF for secure data transmission. Parties each have a PUF used for encryption and decryption; this is facilitated by constraining the PUF to be commutative. This framework is evaluated with a primitive permutation network - a barrel shifter. Physical randomness is derived from the delay of different shift paths. Barrel shifter (BS) PUF captures the delay of different shift paths. This delay is entangled with message bits before they are sent across an insecure channel. BS-PUF is implemented using transmission gates; their characteristics ensure same-chip reproducibility, a necessary property of PUFs. Post-layout simulations of a common centroid layout 8-level barrel shifter in 0.13 {\mu}m technology assess uniqueness, stability and randomness properties. BS-PUFs pass all selected NIST statistical randomness tests. Stability similar to Ring Oscillator (RO) PUFs under environment variation is shown. Logistic regression of 100,000 plaintext-ciphertext pairs (PCPs) failed to successfully model BS- PUF behavior

    In-packet Bloom filters: Design and networking applications

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    The Bloom filter (BF) is a well-known space-efficient data structure that answers set membership queries with some probability of false positives. In an attempt to solve many of the limitations of current inter-networking architectures, some recent proposals rely on including small BFs in packet headers for routing, security, accountability or other purposes that move application states into the packets themselves. In this paper, we consider the design of such in-packet Bloom filters (iBF). Our main contributions are exploring the design space and the evaluation of a series of extensions (1) to increase the practicality and performance of iBFs, (2) to enable false-negative-free element deletion, and (3) to provide security enhancements. In addition to the theoretical estimates, extensive simulations of the multiple design parameters and implementation alternatives validate the usefulness of the extensions, providing for enhanced and novel iBF networking applications.Comment: 15 pages, 11 figures, preprint submitted to Elsevier COMNET Journa

    Feasibility of Using Bandwidth Efficient Modulation to Upgrade the CMS Tracker Readout Optical Links

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    Plans to upgrade the LHC after approximately 10 years of operation are currently being considered at CERN. A tenfold increase in luminosity delivered to the experiments is envisaged in the so-called Super LHC (SLHC). This will undoubtedly give rise to significantly larger data volumes from the detectors, requiring faster data readout. The possibility of upgrading the CMS Tracker analog readout optical links using a bandwidth efficient digital modulation scheme for deployment in the SLHC has been extensively explored at CERN. Previous theoretical and experimental studies determined the achievable data rate using a system based on Quadrature Amplitude Modulation (QAM) to be ~3-4Gbit/s (assuming no error correction is used and for an error rate of ~10-9). In this note we attempt to quantify the feasibility of such an upgrade in terms of hardware implementation complexity, applicability to the high energy physics (HEP) environment, technological feasibility and R&D effort required.Comment: CERN CMS Note. 16 pages, 10 figure
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