289 research outputs found

    Memcapacitive Devices in Logic and Crossbar Applications

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    Over the last decade, memristive devices have been widely adopted in computing for various conventional and unconventional applications. While the integration density, memory property, and nonlinear characteristics have many benefits, reducing the energy consumption is limited by the resistive nature of the devices. Memcapacitors would address that limitation while still having all the benefits of memristors. Recent work has shown that with adjusted parameters during the fabrication process, a metal-oxide device can indeed exhibit a memcapacitive behavior. We introduce novel memcapacitive logic gates and memcapacitive crossbar classifiers as a proof of concept that such applications can outperform memristor-based architectures. The results illustrate that, compared to memristive logic gates, our memcapacitive gates consume about 7x less power. The memcapacitive crossbar classifier achieves similar classification performance but reduces the power consumption by a factor of about 1,500x for the MNIST dataset and a factor of about 1,000x for the CIFAR-10 dataset compared to a memristive crossbar. Our simulation results demonstrate that memcapacitive devices have great potential for both Boolean logic and analog low-power applications

    Reliable Modeling of Ideal Generic Memristors via State-Space Transformation

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    The paper refers to problems of modeling and computer simulation of generic memristors caused by the so-called window functions, namely the stick effect, nonconvergence, and finding fundamentally incorrect solutions. A profoundly different modeling approach is proposed, which is mathematically equivalent to window-based modeling. However, due to its numerical stability, it definitely smoothes the above problems away

    Neuro-memristive Circuits for Edge Computing: A review

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    The volume, veracity, variability, and velocity of data produced from the ever-increasing network of sensors connected to Internet pose challenges for power management, scalability, and sustainability of cloud computing infrastructure. Increasing the data processing capability of edge computing devices at lower power requirements can reduce several overheads for cloud computing solutions. This paper provides the review of neuromorphic CMOS-memristive architectures that can be integrated into edge computing devices. We discuss why the neuromorphic architectures are useful for edge devices and show the advantages, drawbacks and open problems in the field of neuro-memristive circuits for edge computing

    A differential memristive synapse circuit for on-line learning in neuromorphic computing systems

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    Spike-based learning with memristive devices in neuromorphic computing architectures typically uses learning circuits that require overlapping pulses from pre- and post-synaptic nodes. This imposes severe constraints on the length of the pulses transmitted in the network, and on the network's throughput. Furthermore, most of these circuits do not decouple the currents flowing through memristive devices from the one stimulating the target neuron. This can be a problem when using devices with high conductance values, because of the resulting large currents. In this paper we propose a novel circuit that decouples the current produced by the memristive device from the one used to stimulate the post-synaptic neuron, by using a novel differential scheme based on the Gilbert normalizer circuit. We show how this circuit is useful for reducing the effect of variability in the memristive devices, and how it is ideally suited for spike-based learning mechanisms that do not require overlapping pre- and post-synaptic pulses. We demonstrate the features of the proposed synapse circuit with SPICE simulations, and validate its learning properties with high-level behavioral network simulations which use a stochastic gradient descent learning rule in two classification tasks.Comment: 18 Pages main text, 9 pages of supplementary text, 19 figures. Patente

    Simple Floating Voltage-Controlled Memductor Emulator for Analog Applications

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    The topic of memristive circuits is a novel topic in circuit theory that has become of great importance due to its unique behavior which is useful in different applications. But since there is a lack of memristor samples, a memristor emulator is used instead of a solid state memristor. In this paper, a new simple floating voltage-controlled memductor emulator is introduced which is implemented using commercial off the shelf (COTS) realization. The mathematical modeling of the proposed circuit is derived to match the theoretical model. The proposed circuit is tested experimentally using different excitation signals such as sinusoidal, square, and triangular waves showing an excellent matching with previously reported simulations
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