Improving Phase Change Memory (PCM) and Spin-Torque-Transfer Magnetic-RAM (STT-MRAM) as Next-Generation Memories: A Circuit Perspective

In the memory hierarchy of computer systems, the traditional semiconductor memories Static RAM (SRAM) and Dynamic RAM (DRAM) have already served for several decades as cache and main memory. With technology scaling, they face increasingly intractable challenges like power, density, reliability and scalability. As a result, they become less appealing in the multi/many-core era with ever increasing size and memory-intensity of working sets. Recently, there is an increasing interest in using emerging non-volatile memory technologies in replacement of SRAM and DRAM, due to their advantages like non-volatility, high device density, near-zero cell leakage and resilience to soft errors. Among several new memory technologies, Phase Change Memory (PCM) and Spin-Torque-Transfer Magnetic-RAM (STT-MRAM) are most promising candidates in building main memory and cache, respectively. However, both of them possess unique limitations that preventing them from being effectively adopted. In this dissertation, I present my circuit design work on tackling the limitations of PCM and STT-MRAM. At bit level, both PCM and STT-MRAM suffer from excessive write energy, and PCM has very limited write endurance. For PCM, I implement Differential Write to remove large number of unnecessary bit-writes that do not alter the stored data. It is then extended to STT-MRAM as Early Write Termination, with specific optimizations to eliminate the overhead of pre-write read. At array level, PCM enjoys high density but could not provide competitive throughput due to its long write latency and limited number of read/write circuits. I propose a Pseudo-Multi-Port Bank design to exploit intra-bank parallelism by recycling and reusing shared peripheral circuits between accesses in a time-multiplexed manner. On the other hand, although STT-MRAM features satisfactory throughput, its conventional array architecture is constrained on density and scalability by the pitch of the per-column bitline pair. I propose a Common-Source-Line Array architecture which uses a shared source-line along the row, essentially leaving only one bitline per column. For these techniques, I provide circuit level analyses as well as architecture/system level and/or process/device level discussions. In addition, relevant background and work are thoroughly surveyed and potential future research topics are discussed, offering insights and prospects of these next-generation memories

Towards Successful Application of Phase Change Memories: Addressing Challenges from Write Operations

The emerging Phase Change Memory (PCM) technology is drawing increasing attention due to its advantages in non-volatility, byte-addressability and scalability. It is regarded as a promising candidate for future main memory. However, PCM's write operation has some limitations that pose challenges to its application in memory. The disadvantages include long write latency, high write power and limited write endurance. In this thesis, I present my effort towards successful application of PCM memory. My research consists of several optimizing techniques at both the circuit and architecture level. First, at the circuit level, I propose Differential Write to remove unnecessary bit changes in PCM writes. This is not only beneficial to endurance but also to the energy and latency of writes. Second, I propose two memory scheduling enhancements (AWP and RAWP) for a non-blocking bank design. My memory scheduling enhancements can exploit intra-bank parallelism provided by non-blocking bank design, and achieve significant throughput improvement. Third, I propose Bit Level Power Budgeting (BPB), a fine-grained power budgeting technique that leverages the information from Differential Write to achieve even higher memory throughput under the same power budget. Fourth, I propose techniques to improve the QoS tuning ability of high-priority applications when running on PCM memory. In summary, the techniques I propose effectively address the challenges of PCM's write operations. In addition, I present the experimental infrastructure in this work and my visions of potential future research topics, which could be helpful to other researchers in the area

The design and analysis of novel integrated phase-change photonic memory and computing devices

The current massive growth in data generation and communication challenges traditional computing and storage paradigms. The integrated silicon photonic platform may alleviate the physical limitations resulting from the use of electrical interconnects and the conventional von Neuman computing architecture, due to its intrinsic energy and bandwidth advantages. This work focuses on the development of the phase-change all-photonic memory (PPCM), a device potentially enabling the transition from the electrical to the optical domain by providing the (previously unavailable) non-volatile all-photonic storage functionality. PPCM devices allow for all-optical encoding of the information on the crystal fraction of a waveguide-implemented phase-change material layer, here Ge2Sb2Te5, which in turn modulates the transmitted signal amplitude. This thesis reports novel developments of the numerical methods necessary to emulate the physics of PPCM device operation and performance characteristics, illustrating solutions enabling the realization of a simulation framework modelling the inherently three-dimensional and self-influencing optical, thermal and phase-switching behaviour of PPCM devices. This thesis also depicts an innovative, fast and cost-effective method to characterise the key optical properties of phase-change materials (upon which the performance of PPCM devices depend), exploiting the reflection pattern of a purposely built layer stack, combined with a smart fit algorithm adapting potential solutions drawn from the scientific literature. The simulation framework developed in the thesis is used to analyse reported PPCM experimental results. Numerous sources of uncertainty are underlined, whose systematic analysis reduced to the peculiar non-linear optical properties of Ge2Sb2Te5. Yet, the data fit process validates both the simulation tool and the remaining physical assumptions, as the model captures the key aspects of the PPCM at high optical intensity, and reliably and accurately predicts its behaviour at low intensity, enabling to investigate its underpinning physical mechanisms. Finally, a novel PPCM memory architecture, exploiting the interaction of a much-reduced Ge2Sb2Te5 volume with a plasmonic resonant nanoantenna, is proposed and numerically investigated. The architecture concept is described and the memory functionality is demonstrated, underlining its potential energy and speed improvement on the conventional device by up to two orders of magnitude.Engineering and Physical Sciences Research Council (EPSRC

Reconfigurable Phase-Change Metasurface Absorbers for Optoelectronics Device Applications

This thesis is concerned with the design and development of dynamically reconfigurable optical metasurfaces. This reconfigurability is achieved by integrating chalcogenide phase-change materials with plasmonic resonator structures of the metal-insulator-metal type. Switching the phase-change material between its amorphous and crystalline states results in dramatic changes in its optical properties, with consequent dramatic changes in the resonant behaviour of the plasmonic metasurface with which it is integrated. Moreover, such changes are non-volatile, reversible and potentially very fast, in the order of nanoseconds. The first part of the thesis is dedicated to the design, fabrication and characterisation of metasurface devices working at telecommunications wavelengths, specifically at wavelengths corresponding to the C-band (1530 to 1565 nm), and that act as a form of perfect absorber when the phase-change layer (in this case Ge2Sb2Te5) is amorphous but reflect strongly when switched to the crystalline state. Such behaviour can be used, for example, to provide a form of optical amplitude modulator. Fabricated devices not only showed very good performance, including a large modulation depth of ~77% and an extinction ratio of ~20 dB, but also incorporated a number of practicable design features often overlooked in the literature, including a means for protecting the phase-change layer from environmental oxidation and, importantly, an electrically-driven in-situ switching capability. In the second part of the thesis a method, based on eigenmode analysis and critical coupling theory, is developed to allow for the design and fabrication of perfect absorber type devices in a simple and efficient way, while at the same time maintaining design control over the key performance characteristics of resonant frequency, reflection coefficient at resonance and quality factor. Validation of this new method was carried out via the design and fabrication of a family of absorbers with a range of ‘on-demand’ quality factors, all operating at the same resonant frequency and able to be fabricated simply and simultaneously on the same chip. The final part of the thesis is concerned with the design and development of a switchable phase-change metamaterial type absorber working in the visible part of the spectrum and with non-volatile colour generating capability. With the phase-change layer, here GeTe, in the crystalline phase, the absorber can be tuned to selectively absorb the red, green and blue spectral bands, so generating vivid cyan, magenta and yellow pixels. When the phase-change layer is switched into the amorphous phase, the resonant absorption is suppressed and a flat, pseudo-white reflectance results. This potentially opens up a route to the development of non-volatile, phase-change metamaterial colour displays and colour electronic signage.Engineering and Physical Sciences Research Council (EPSRC

NASA Tech Briefs, October 1996

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