73 research outputs found

    Dynamic Behavior Analysis and Synchronization of Memristor-Coupled Heterogeneous Discrete Neural Networks

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    © 2023 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).Continuous memristors have been widely studied in recent years; however, there are few studies on discrete memristors in the field of neural networks. In this paper, a four-stable locally active discrete memristor (LADM) is proposed as a synapse, which is used to connect a two-dimensional Chialvo neuron and a three-dimensional KTZ neuron, and construct a simple heterogeneous discrete neural network (HDNN). Through a bifurcation diagram and Lyapunov exponents diagram, the period and chaotic regions of the discrete neural network model are shown. Through numerical analysis, it was found that the chaotic region and periodic region of the neural network based on DLAM are significantly improved. In addition, coexisting chaos and chaos attractors, coexisting periodic and chaotic attractors, and coexisting periodic and periodic attractors will appear when the initial value of the LADM is changed. Coupled by a LADM synapse, two heterogeneous discrete neurons are gradually synchronized by changing the coupling strength. This paper lays a good foundation for the future analysis of LADMs and the related research of discrete neural networks coupled by LADMs.Peer reviewe

    Experimental study of artificial neural networks using a digital memristor simulator

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    © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.This paper presents a fully digital implementation of a memristor hardware simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field programmable gate array (FPGA) families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks (ANNs), implementing examples of associative memory and unsupervised learning of spatio-temporal correlations in parallel input streams using a simplified STDP. We provide the full circuit schematics of all our digital circuit designs and comment on the required hardware resources and their scaling trends, thus presenting a design framework for applications based on our hardware simulator.Peer ReviewedPostprint (author's final draft

    Memristive Cluster Based Compact High-Density Nonvolatile Memory Design and Application for Image Storage

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    © 2022 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/)As a new type of nonvolatile device, the memristor has become one of the most promising technologies for designing a new generation of high-density memory. In this paper, a 4-bit high-density nonvolatile memory based on a memristor is designed and applied to image storage. Firstly, a memristor cluster structure consisting of a transistor and four memristors is designed. Furthermore, the memristor cluster is used as a memory cell in the crossbar array structure to realize the memory design. In addition, when the designed non-volatile memory is applied to gray scale image storage, only two memory cells are needed for the storage of one pixel. Through the Pspice circuit simulation, the results show that compared with the state-of-the-art technology, the memory designed in this paper has better storage density and read–write speed. When it is applied to image storage, it achieves the effect of no distortion and fast storage.Peer reviewe

    Memristors : a journey from material engineering to beyond Von-Neumann computing

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    Memristors are a promising building block to the next generation of computing systems. Since 2008, when the physical implementation of a memristor was first postulated, the scientific community has shown a growing interest in this emerging technology. Thus, many other memristive devices have been studied, exploring a large variety of materials and properties. Furthermore, in order to support the design of prac-tical applications, models in different abstract levels have been developed. In fact, a substantial effort has been devoted to the development of memristive based applications, which includes high-density nonvolatile memories, digital and analog circuits, as well as bio-inspired computing. In this context, this paper presents a survey, in hopes of summarizing the highlights of the literature in the last decade

    Complete Stability of Neural Networks With Extended Memristors

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    The article considers a large class of delayed neural networks (NNs) with extended memristors obeying the Stanford model. This is a widely used and popular model that accurately describes the switching dynamics of real nonvolatile memristor devices implemented in nanotechnology. The article studies via the Lyapunov method complete stability (CS), i.e., convergence of trajectories in the presence of multiple equilibrium points (EPs), for delayed NNs with Stanford memristors. The obtained conditions for CS are robust with respect to variations of the interconnections and they hold for any value of the concentrated delay. Moreover, they can be checked either numerically, via a linear matrix inequality (LMI), or analytically, via the concept of Lyapunov diagonally stable (LDS) matrices. The conditions ensure that at the end of the transient capacitor voltages and NN power vanish. In turn, this leads to advantages in terms of power consumption. This notwithstanding, the nonvolatile memristors can retain the result of computation in accordance with the in-memory computing principle. The results are verified and illustrated via numerical simulations. From a methodological viewpoint, the article faces new challenges to prove CS since due to the presence of nonvolatile memristors the NNs possess a continuum of nonisolated EPs. Also, for physical reasons, the memristor state variables are constrained to lie in some given intervals so that the dynamics of the NNs need to be modeled via a class of differential inclusions named differential variational inequalities

    A locally active discrete memristor model and its application in a hyperchaotic map

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    © 2022 Springer Nature Switzerland AG. Part of Springer Nature. This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1007/s11071-021-07132-5The continuous memristor is a popular topic of research in recent years, however, there is rare discussion about the discrete memristor model, especially the locally active discrete memristor model. This paper proposes a locally active discrete memristor model for the first time and proves the three fingerprints characteristics of this model according to the definition of generalized memristor. A novel hyperchaotic map is constructed by coupling the discrete memristor with a two-dimensional generalized square map. The dynamical behaviors are analyzed with attractor phase diagram, bifurcation diagram, Lyapunov exponent spectrum, and dynamic behavior distribution diagram. Numerical simulation analysis shows that there is significant improvement in the hyperchaotic area, the quasi-periodic area and the chaotic complexity of the two-dimensional map when applying the locally active discrete memristor. In addition, antimonotonicity and transient chaos behaviors of system are reported. In particular, the coexisting attractors can be observed in this discrete memristive system, resulting from the different initial values of the memristor. Results of theoretical analysis are well verified with hardware experimental measurements. This paper lays a great foundation for future analysis and engineering application of the discrete memristor and relevant the study of other hyperchaotic maps.Peer reviewedFinal Accepted Versio

    Multidimensional scaling locus of memristor and fractional order elements

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    This paper combines the synergies of three mathematical and computational generalizations. The concepts of fractional calculus, memristor and information visualization extend the classical ideas of integro-differential calculus, electrical elements and data representation, respectively. The study embeds these notions in a common framework, with the objective of organizing and describing the "continuum" of fractional order elements (FOE). Each FOE is characterized by its behavior, either in the time or in the frequency domains, and the differences between the FOE are captured by a variety of distinct indices, such as the Arccosine, Canberra, Jaccard and Sørensen distances. The dissimilarity information is processed by the multidimensional scaling (MDS) computational algorithm to unravel possible clusters and to allow a direct pattern visualization. The MDS yields 3-dimensional loci organized according to the FOE characteristics both for linear and nonlinear elements. The new representation generalizes the standard Cartesian 2-dimensional periodic table of elements.Fundação para a Ciência e Tecnologia, Portugal, Reference: Projeto LAETA - UID/EMS/50022/2013.info:eu-repo/semantics/publishedVersio

    Memristors for the Curious Outsiders

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    We present both an overview and a perspective of recent experimental advances and proposed new approaches to performing computation using memristors. A memristor is a 2-terminal passive component with a dynamic resistance depending on an internal parameter. We provide an brief historical introduction, as well as an overview over the physical mechanism that lead to memristive behavior. This review is meant to guide nonpractitioners in the field of memristive circuits and their connection to machine learning and neural computation.Comment: Perpective paper for MDPI Technologies; 43 page

    Synaptic Plasticity in Memristive Artificial Synapses and Their Robustness Against Noisy Inputs

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    Emerging brain-inspired neuromorphic computing paradigms require devices that can emulate the complete functionality of biological synapses upon different neuronal activities in order to process big data flows in an efficient and cognitive manner while being robust against any noisy input. The memristive device has been proposed as a promising candidate for emulating artificial synapses due to their complex multilevel and dynamical plastic behaviors. In this work, we exploit ultrastable analog BiFeO3 (BFO)-based memristive devices for experimentally demonstrating that BFO artificial synapses support various long-term plastic functions, i.e., spike timing-dependent plasticity (STDP), cycle number-dependent plasticity (CNDP), and spiking rate-dependent plasticity (SRDP). The study on the impact of electrical stimuli in terms of pulse width and amplitude on STDP behaviors shows that their learning windows possess a wide range of timescale configurability, which can be a function of applied waveform. Moreover, beyond SRDP, the systematical and comparative study on generalized frequency-dependent plasticity (FDP) is carried out, which reveals for the first time that the ratio modulation between pulse width and pulse interval time within one spike cycle can result in both synaptic potentiation and depression effect within the same firing frequency. The impact of intrinsic neuronal noise on the STDP function of a single BFO artificial synapse can be neglected because thermal noise is two orders of magnitude smaller than the writing voltage and because the cycle-to-cycle variation of the current–voltage characteristics of a single BFO artificial synapses is small. However, extrinsic voltage fluctuations, e.g., in neural networks, cause a noisy input into the artificial synapses of the neural network. Here, the impact of extrinsic neuronal noise on the STDP function of a single BFO artificial synapse is analyzed in order to understand the robustness of plastic behavior in memristive artificial synapses against extrinsic noisy input
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