New Grounded and Floating Simulated Inductance Circuits using Current Differencing Transconductance Amplifiers

Current differencing transconductance amplifier (CDTA) is receiving considerable attention as a building block for current-mode (CM) analog signal processing / signal generation. In this paper, new CDTA based lossless grounded and floating inductance simulation circuits have been proposed. The proposed grounded simulated inductance circuit employs two CDTAs and a single grounded capacitor whereas the floating simulated inductance circuit employs three CDTAs and a grounded capacitor. The circuit for grounded inductance does not require any realization conditions whereas in case of floating inductance only equality of two transconductances is needed (which can be easily maintained in practice by ensuring equal dc bias currents in the two transconductance amplifiers). Some sample results demonstrating the applications of the new simulated inductors using CMOS CDTAs have been given to confirm the workability of the new circuits

Voltage Differencing Current Conveyor Based Voltage-Mode and Current-Mode Universal Biquad Filters with Electronic Tuning Facility

The objective of this study is to present four new universal biquad filters, two voltage-mode multi-input-single-output (MISO), and two current-mode single-input-multi-output (SIMO). The filters employ one voltage differencing current conveyor (VDCC) as an active element and two capacitors along with two resistors as passive elements. All the five filter responses, i.e., high-pass, low-pass, band-pass, band-stop, and all-pass responses, are obtained from the same circuit topology. Moreover, the pole frequency and quality factor are independently tunable. Additionally, they do not require any double/inverted input signals for response realization. Furthermore, they enjoy low active and passive sensitivities. Various regular analyses support the design ideas. The functionality of the presented filters are tested by PSPICE simulations using TSMC 0.18 µm technology parameters with ± 0.9 V supply voltage. The circuits are also justified experimentally by creating the VDCC block using commercially available OPA860 ICs. The experimental and simulation results agree well with the theoretically predicted results

Tunable Mixed-Mode Voltage Differencing Buffered Amplifier-Based Universal Filter with Independently High-Q Factor Controllability

This paper proposes the design of a mixed-mode universal biquad configuration, which realizes generic filter functions in all four possible modes, namely voltage mode (VM), current mode (CM), transadmittance mode (TAM), and transimpedance mode (TIM). The filter architecture employs two voltage differencing buffered amplifiers (VDBAs), two resistors and two capacitors, and can provide lowpass (LP), bandpass (BP), highpass (HP), bandstop (BS), and allpass (AP) biquadratic filtering responses without any circuit alteration. All passive elements used are grounded, except VM. The circuit not only allows for the electronic tuning of the natural angular frequency (o), but also achieves orthogonal tunability of the quality factor (Q). It also provides the feature of availability of output voltage at the low-output impedance terminal in VM and TIM, and does not require inverting-type or double-type input signals to realize all the responses. Moreover, in all modes of operation, the high-Q filter can be easily obtained by adjusting a single resistance value. Influences of the VDBA nonidealities and parasitic elements are also discussed in detail. PSPICE simulations with TSMC 0.18-µm CMOS process parameters and experimental testing results with commercially available IC LT1228s have been used to validate the theoretical predictions

Low Voltage Low Power Analogue Circuits Design

Disertační práce je zaměřena na výzkum nejběžnějších metod, které se využívají při návrhu analogových obvodů s využití nízkonapěťových (LV) a nízkopříkonových (LP) struktur. Tyto LV LP obvody mohou být vytvořeny díky vyspělým technologiím nebo také využitím pokročilých technik návrhu. Disertační práce se zabývá právě pokročilými technikami návrhu, především pak nekonvenčními. Mezi tyto techniky patří využití prvků s řízeným substrátem (bulk-driven - BD), s plovoucím hradlem (floating-gate - FG), s kvazi plovoucím hradlem (quasi-floating-gate - QFG), s řízeným substrátem s plovoucím hradlem (bulk-driven floating-gate - BD-FG) a s řízeným substrátem s kvazi plovoucím hradlem (quasi-floating-gate - BD-QFG). Práce je také orientována na možné způsoby implementace známých a moderních aktivních prvků pracujících v napěťovém, proudovém nebo mix-módu. Mezi tyto prvky lze začlenit zesilovače typu OTA (operational transconductance amplifier), CCII (second generation current conveyor), FB-CCII (fully-differential second generation current conveyor), FB-DDA (fully-balanced differential difference amplifier), VDTA (voltage differencing transconductance amplifier), CC-CDBA (current-controlled current differencing buffered amplifier) a CFOA (current feedback operational amplifier). Za účelem potvrzení funkčnosti a chování výše zmíněných struktur a prvků byly vytvořeny příklady aplikací, které simulují usměrňovací a induktanční vlastnosti diody, dále pak filtry dolní propusti, pásmové propusti a také univerzální filtry. Všechny aktivní prvky a příklady aplikací byly ověřeny pomocí PSpice simulací s využitím parametrů technologie 0,18 m TSMC CMOS. Pro ilustraci přesného a účinného chování struktur je v disertační práci zahrnuto velké množství simulačních výsledků.The dissertation thesis is aiming at examining the most common methods adopted by analog circuits' designers in order to achieve low voltage (LV) low power (LP) configurations. The capability of LV LP operation could be achieved either by developed technologies or by design techniques. The thesis is concentrating upon design techniques, especially the non–conventional ones which are bulk–driven (BD), floating–gate (FG), quasi–floating–gate (QFG), bulk–driven floating–gate (BD–FG) and bulk–driven quasi–floating–gate (BD–QFG) techniques. The thesis also looks at ways of implementing structures of well–known and modern active elements operating in voltage–, current–, and mixed–mode such as operational transconductance amplifier (OTA), second generation current conveyor (CCII), fully–differential second generation current conveyor (FB–CCII), fully–balanced differential difference amplifier (FB–DDA), voltage differencing transconductance amplifier (VDTA), current–controlled current differencing buffered amplifier (CC–CDBA) and current feedback operational amplifier (CFOA). In order to confirm the functionality and behavior of these configurations and elements, they have been utilized in application examples such as diode–less rectifier and inductance simulations, as well as low–pass, band–pass and universal filters. All active elements and application examples have been verified by PSpice simulator using the 0.18 m TSMC CMOS parameters. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of structures.

Low power class-AB VCII with extended dynamic range

voltage swing both at the X terminal and at the Z terminal. The VCII consists of a regulated common gate configuration at the Y current input terminal and a class-AB complementary-MOS closed loop output voltage follower that ensures the voltage buffering action between the voltage input X and the voltage output Z terminals. Spice simulation results using AMS 0.35 μm with a ±0.9 V supply voltage are provided to demonstrate the validity of the proposed topology. With a total power consumption of 28 μW, the VCII achieves a voltage swing at the X terminal of ±0.8 V, whereas a ±0.72 V is achieved on the Z terminal. Simulation results for DC and AC voltage and current gains are given, as well as harmonic distortions and noise figures. A final comparison table is also presented, where the proposed VCII is compared with other solutions presented in the literature

A miniature tunable quadrature shadow oscillator with orthogonal control

This article presents a new design of a quadrature shadow oscillator. The oscillator is realized using one input and two outputs of a second-order filter cell together with external amplifiers in a feedback configuration. The oscillation characteristics are controlled via the external gain without disturbing the internal filter cell, following the concept of the shadow oscillator. The proposed circuit configuration is simple with a small component-count. It consists of, two voltage-different transconductance amplifiers (VDTAs) along with a couple of passive elements. The frequency of oscillation (FO) and the condition of oscillation (CO) are controlled orthogonally via the dc bias current and external gain. Moreover, with the addition of the external gain, the frequency range of oscillation can be further extended. The proposed work is verified by computer simulation with the use of 180 nm complementary metal–oxide–semiconductor (CMOS) model parameters. The simulation gives satisfactory results of two sinusoidal output signals in quadrature with some small total harmonic distortions (THD). In addition, a circuit experiment is performed using the commercial operational transconductance amplifiers LM13700 as the active components. The circuit experiment also demonstrates satisfactory outcome which confirms the validity of the proposed circuit

CMOS Hyperbolic Sine ELIN filters for low/audio frequency biomedical applications

Hyperbolic-Sine (Sinh) filters form a subclass of Externally-Linear-Internally-Non- Linear (ELIN) systems. They can handle large-signals in a low power environment under half the capacitor area required by the more popular ELIN Log-domain filters. Their inherent class-AB nature stems from the odd property of the sinh function at the heart of their companding operation. Despite this early realisation, the Sinh filtering paradigm has not attracted the interest it deserves to date probably due to its mathematical and circuit-level complexity. This Thesis presents an overview of the CMOS weak inversion Sinh filtering paradigm and explains how biomedical systems of low- to audio-frequency range could benefit from it. Its dual scope is to: consolidate the theory behind the synthesis and design of high order Sinh continuous–time filters and more importantly to confirm their micro-power consumption and 100+ dB of DR through measured results presented for the first time. Novel high order Sinh topologies are designed by means of a systematic mathematical framework introduced. They employ a recently proposed CMOS Sinh integrator comprising only p-type devices in its translinear loops. The performance of the high order topologies is evaluated both solely and in comparison with their Log domain counterparts. A 5th order Sinh Chebyshev low pass filter is compared head-to-head with a corresponding and also novel Log domain class-AB topology, confirming that Sinh filters constitute a solution of equally high DR (100+ dB) with half the capacitor area at the expense of higher complexity and power consumption. The theoretical findings are validated by means of measured results from an 8th order notch filter for 50/60Hz noise fabricated in a 0.35μm CMOS technology. Measured results confirm a DR of 102dB, a moderate SNR of ~60dB and 74μW power consumption from 2V power supply