702 research outputs found

    A Review of Analog Audio Scrambling Methods for Residual Intelligibility

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    In this paper, a review of the techniques available in different categories of audio scrambling schemes is done with respect to Residual Intelligibility. According to Shannon's secure communication theory, for the residual intelligibility to be zero the scrambled signal must represent a white signal. Thus the scrambling scheme that has zero residual intelligibility is said to be highly secure. Many analog audio scrambling algorithms that aim to achieve lower levels of residual intelligibility are available. In this paper a review of all the existing analog audio scrambling algorithms proposed so far and their properties and limitations has been presented. The aim of this paper is to provide an insight for evaluating various analog audio scrambling schemes available up-to-date. The review shows that the algorithms have their strengths and weaknesses and there is no algorithm that satisfies all the factors to the maximum extent. Keywords: residual Intelligibility, audio scrambling, speech scramblin

    Speech Scrambling Based on Wavelet Transform

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    Space Station communications and tracking systems modeling and RF link simulation

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    In this final report, the effort spent on Space Station Communications and Tracking System Modeling and RF Link Simulation is described in detail. The effort is mainly divided into three parts: frequency division multiple access (FDMA) system simulation modeling and software implementation; a study on design and evaluation of a functional computerized RF link simulation/analysis system for Space Station; and a study on design and evaluation of simulation system architecture. This report documents the results of these studies. In addition, a separate User's Manual on Space Communications Simulation System (SCSS) (Version 1) documents the software developed for the Space Station FDMA communications system simulation. The final report, SCSS user's manual, and the software located in the NASA JSC system analysis division's VAX 750 computer together serve as the deliverables from LinCom for this project effort

    Design of an OFDM Physical Layer Encryption Scheme

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    This paper presents a new encryption scheme implemented at the physical layer of wireless networks employing orthogonal frequency-division multiplexing (OFDM). The new scheme obfuscates the subcarriers by randomly reserving several subcarriers for dummy data and resequences the training symbol by a new secure sequence. Subcarrier obfuscation renders the OFDM transmission more secure and random, whereas training symbol resequencing protects the entire physical layer packet but does not affect the normal functions of synchronization and channel estimation of legitimate users while preventing eavesdroppers from performing these functions. The security analysis shows that the system is robust to various attacks by analyzing the search space using an exhaustive key search. Our scheme is shown to perform better in terms of search space, key rate, and complexity in comparison with other OFDM physical layer encryption schemes. The scheme offers options for users to customize the security level and the key rate according to the hardware resource. Its low complexity nature also makes the scheme suitable for resource-limited devices. Details of practical design considerations are highlighted by applying the approach to an IEEE 802.11 OFDM system case study

    Implementation of FPGA in the Design of Embedded Systems

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    The use of FPGAs (Field Programmable Gate Arrays) and configurable processors is an interesting new phenomenon in embedded development. FPGAs offer all of the features needed to implement most complex designs. Clock management is facilitated by on-chip PLL (phase-locked loop) or DLL (delay-locked loop) circuitry. Dedicated memory blocks can be configured as basic single-port RAMs, ROMs, FIFOs, or CAMs. Data processing, as embodied in the devices’ logic fabric, varies widely. The ability to link the FPGA with backplanes, high-speed buses, and memories is afforded by support for various single ended and differential I/O standards. Also found on today’s FPGAs are system-building resources such as high speed serial I/Os, arithmetic modules, embedded processors, and large amounts of memory. Here in our project we have tried to implement such powerful FPGAs in the design of possible embedded systems that can be designed, burned and deployed at the site of operation for handling of many kinds of applications. In our project we have basically dealt with two of such applications –one the prioritized traffic light controller and other a speech encrypting and decrypting system

    Spatio-Temporal processing for Optimum Uplink-Downlink WCDMA Systems

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    The capacity of a cellular system is limited by two different phenomena, namely multipath fading and multiple access interference (MAl). A Two Dimensional (2-D) receiver combats both of these by processing the signal both in the spatial and temporal domain. An ideal 2-D receiver would perform joint space-time processing, but at the price of high computational complexity. In this research we investigate computationally simpler technique termed as a Beamfom1er-Rake. In a Beamformer-Rake, the output of a beamfom1er is fed into a succeeding temporal processor to take advantage of both the beamformer and Rake receiver. Wireless service providers throughout the world are working to introduce the third generation (3G) and beyond (3G) cellular service that will provide higher data rates and better spectral efficiency. Wideband COMA (WCDMA) has been widely accepted as one of the air interfaces for 3G. A Beamformer-Rake receiver can be an effective solution to provide the receivers enhanced capabilities needed to achieve the required performance of a WCDMA system. We consider three different Pilot Symbol Assisted (PSA) beamforming techniques, Direct Matrix Inversion (DMI), Least-Mean Square (LMS) and Recursive Least Square (RLS) adaptive algorithms. Geometrically Based Single Bounce (GBSB) statistical Circular channel model is considered, which is more suitable for array processing, and conductive to RAKE combining. The performances of the Beam former-Rake receiver are evaluated in this channel model as a function of the number of antenna elements and RAKE fingers, in which are evaluated for the uplink WCDMA system. It is shown that, the Beamformer-Rake receiver outperforms the conventional RAKE receiver and the conventional beamformer by a significant margin. Also, we optimize and develop a mathematical formulation for the output Signal to Interference plus Noise Ratio (SINR) of a Beam former-Rake receiver. In this research, also, we develop, simulate and evaluate the SINR and Signal to Noise Ratio (Et!Nol performances of an adaptive beamforming technique in the WCDMA system for downlink. The performance is then compared with an omnidirectional antenna system. Simulation shows that the best perfom1ance can be achieved when all the mobiles with same Angle-of-Arrival (AOA) and different distance from base station are formed in one beam

    Portable Waveform Development for Software Defined Radios

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    This work focuses on the question: "How can we build waveforms that can be moved from one platform to another?\u27\u27 Therefore an approach based on the Model Driven Architecture was evaluated. Furthermore, a proof of concept is given with the port of a TETRA waveform from a USRP platform to an SFF SDR platform

    On-board processing satellite network architecture and control study

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    The market for telecommunications services needs to be segmented into user classes having similar transmission requirements and hence similar network architectures. Use of the following transmission architecture was considered: satellite switched TDMA; TDMA up, TDM down; scanning (hopping) beam TDMA; FDMA up, TDM down; satellite switched MF/TDMA; and switching Hub earth stations with double hop transmission. A candidate network architecture will be selected that: comprises multiple access subnetworks optimized for each user; interconnects the subnetworks by means of a baseband processor; and optimizes the marriage of interconnection and access techniques. An overall network control architecture will be provided that will serve the needs of the baseband and satellite switched RF interconnected subnetworks. The results of the studies shall be used to identify elements of network architecture and control that require the greatest degree of technology development to realize an operational system. This will be specified in terms of: requirements of the enabling technology; difference from the current available technology; and estimate of the development requirements needed to achieve an operational system. The results obtained for each of these tasks are presented

    Reconfigurable Radio System Test bed for security research

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    Technological progress on the digital processing has opened the way to a novel implementation approach for wireless communication platforms where most of the digital signal processing is done in software rather than in hardware. Such systems have been known as Software Defined Radio (SDR) or Reconfigurable Radio Systems (RRS). A typical SDR/RRS is able to execute all the radio frequency and base-band processing though software components rather then hardware components as in conventional radio communication systems. This capability provides a high level of reconfigurability and the possibility to implement a number of different algorithms for digital processing. Therefore, SDR/RRS can be used for a variety or purposes including the possibility of implementing wireless security attacks against conventional communication systems. In this technical report, we present an application of the SDR/RRS platform to implement a security attack against a DECT platform. The SDR/RRS platform has been used to implement a DECT demodulator and a processing module to eavesdrop and capture user and control data transmitted by a DECT system. The commercially available Universal Software Radio Peripheral (USRP) has been used as SDR/RRS platform for the development of the prototype. The paper presents the technical challenges and implementation details in the development of the prototype and an overview of the capabilities of the USRP to implement wireless security attacks. The SDR/RRS platform used in the project is quite versatile and it can be used for a number of other applications related to DECT or other wireless communication systems.JRC.G.6-Security technology assessmen
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