High Frequency Devices and Circuit Modules for Biochemical Microsystems

This dissertation investigates high frequency devices and circuit modules for biochemical microsystems. These modules are designed towards replacing external bulky laboratory instruments and integrating with biochemical microsystems to generate and analyze signals in frequency and time domain. The first is a charge pump circuit with modified triple well diodes, which is used as an on-chip power supply. The second is an on-chip pulse generation circuit to generate high voltage short pulses. It includes a pulse-forming-line (PFL) based pulse generation circuit, a Marx generator and a Blumlein generator. The third is a six-port circuit based on four quadrature hybrids with 2.0~6.0 GHz operating frequency tuning range for analyzing signals in frequency domain on-chip. The fourth is a high-speed sample-and-hold circuit (SHC) with a 13.3 Gs/s sampling rate and ~11.5 GHz input bandwidth for analyzing signals in time domain on-chip. The fifth is a novel electron spin resonance (ESR) spectroscopy with high-sensitivity and wide frequency tuning range

Circuit Modules for CMOS High-Power Short Pulse Generators

High-power short electrical pulses are important for high-performance functionality integration, such as the development of microelectromechanical/nanoelectromechanical systems (MEMS/NEMS), system on chip (SoC) and lab on chip (LoC). Many of these applications need high-power (low impedance load) short electrical pulses, in addition to CMOS digital intelligence. Therefore, it is of great interest to develop new circuit techniques to generate high-power high-voltage short electrical pulses on-chip. Results on pulse forming line (PFL) based CMOS pulse generator studies are reported. Through simulations, the effects of PFL length, switch speed and switch resistance on the output pulses are clarified. CMOS pulse generators are modeled and analyzed with on-chip transmission lines (TLs) as PFLs and CMOS transistors as switches. In the 0.13 um CMOS process with a 500 um long PFL, post layout simulations show that pulses of 10.4 ps width can be obtained. High-voltage and high-power outputs can be generated with other pulsed power circuits, such as Blumlein PFLs with stacked MOSFET switches. Thus, the PFL circuit significantly extends short and high-power pulse generation capabilities of CMOS technologies. A CMOS circuit with a 4 mm long PFL is implemented in the commercial 0.13 um technology. Pulses of ~ 160 ps duration and 110-200 mV amplitude on a 50 Ohms load are obtained when the power supply is tuned from 1.2 V to 2.0 V. Measurement Instruments limitations are probably the main reasons for the discrepancies among measurement and simulation results. A four-stage charge pump is presented as high voltage bias of the Blumlein PFLs pulse generator. Since Schottky diode has low forward drop voltage (~ 0.3V), using it as charge transfer cell can have high charge pumping gain and avoid additional control circuit for switch. A four-stage charge pump with Schottky diode as charge transfer cell is implemented in a commercial 0.13 um technology. Charge pump output and efficiency under different power supply voltages, load currents and clock frequencies are measured and presented. The maximum output voltage is ~ 6 V and the maximum efficiency is ~ 50%

Scalable and high-sensitivity readout of silicon quantum devices

Quantum computing is predicted to provide unprecedented enhancements in computational power. A quantum computer requires implementation of a well-defined and controlled quantum system of many interconnected qubits, each defined using fragile quantum states. The interest in a spin-based quantum computer in silicon stems from demonstrations of very long spin-coherence times, high-fidelity single spin control and compatibility with industrial mass-fabrication. Industrial scale fabrication of the silicon platform offers a clear route towards a large-scale quantum computer, however, some of the processes and techniques employed in qubit demonstrators are incompatible with a dense and foundry-fabricated architecture. In particular, spin-readout utilises external sensors that require nearly the same footprint as qubit devices. In this thesis, improved readout techniques for silicon quantum devices are presented and routes towards implementation of a scalable and high-sensitivity readout architecture are investigated. Firstly, readout sensitivity of compact gate-based sensors is improved using a high-quality factor resonator and Josephson parametric amplifier that are fabricated separately from quantum dots. Secondly, an integrated transistor-based control circuit is presented using which sequential readout of two quantum dot devices using the same gate-based sensor is achieved. Finally, a large-scale readout architecture based on random-access and frequency multiplexing is introduced. The impact of readout circuit footprint on readout sensitivity is determined, showing routes towards integration of conventional circuits with quantum devices in a dense architecture, and a fault-tolerant architecture based on mediated exchange is introduced, capable of relaxing the limitations on available control circuit footprint per qubit. Demonstrations are based on foundry-fabricated transistors and few-electron quantum dots, showing that industry fabrication is a viable route towards quantum computation at a scale large enough to begin addressing the most challenging computational problems

Statistical analysis of Total Ionizing Dose response in 25-nm NAND Flash memory

Variabilità degli errori, ovvero bit flip, dovuti alla dose totale ionizzante (TID) in memorie Flash SLC da 25 nm. Più di 1 Terabit di celle è stato esposto a raggi gamma da Co-60 e sono stati misurati gli errori indotti dalla radiazione ionizzante. L'obiettivo della tesi è stato lo studio del comportamento delle memorie Flash nello spazio e prevederne l’affidabilità.ope

Index to 1981 NASA Tech Briefs, volume 6, numbers 1-4

Short announcements of new technology derived from the R&D activities of NASA are presented. These briefs emphasize information considered likely to be transferrable across industrial, regional, or disciplinary lines and are issued to encourage commercial application. This index for 1981 Tech Briefs contains abstracts and four indexes: subject, personal author, originating center, and Tech Brief Number. The following areas are covered: electronic components and circuits, electronic systems, physical sciences, materials, life sciences, mechanics, machinery, fabrication technology, and mathematics and information sciences

Low-Power Reconfigurable Sensing Circuitry for the Internet-of-Things Paradigm

With ubiquitous wireless communication via Wi-Fi and nascent 5th Generation mobile communications, more devices -- both smart and traditionally dumb -- will be interconnected than ever before. This burgeoning trend is referred to as the Internet-of-Things. These new sensing opportunities place a larger burden on the underlying circuitry that must operate on finite battery power and/or within energy-constrained environments. New developments of low-power reconfigurable analog sensing platforms like field-programmable analog arrays (FPAAs) present an attractive sensing solution by processing data in the analog domain while staying flexible in design. This work addresses some of the contemporary challenges of low-power wireless sensing via traditional application-specific sensing and with FPAAs. A large emphasis is placed on furthering the development of FPAAs by making them more accessible to designers without a strong integrated-circuit background -- much like FPGAs have done for digital designers