Studies and simulations of the DigiCipher system

During this period the development of simulators for the various high definition television (HDTV) systems proposed to the FCC was continued. The FCC has indicated that it wants the various proposers to collaborate on a single system. Based on all available information this system will look very much like the advanced digital television (ADTV) system with major contributions only from the DigiCipher system. The results of our simulations of the DigiCipher system are described. This simulator was tested using test sequences from the MPEG committee. The results are extrapolated to HDTV video sequences. Once again, some caveats are in order. The sequences used for testing the simulator and generating the results are those used for testing the MPEG algorithm. The sequences are of much lower resolution than the HDTV sequences would be, and therefore the extrapolations are not totally accurate. One would expect to get significantly higher compression in terms of bits per pixel with sequences that are of higher resolution. However, the simulator itself is a valid one, and should HDTV sequences become available, they could be used directly with the simulator. A brief overview of the DigiCipher system is given. Some coding results obtained using the simulator are looked at. These results are compared to those obtained using the ADTV system. These results are evaluated in the context of the CCSDS specifications and make some suggestions as to how the DigiCipher system could be implemented in the NASA network. Simulations such as the ones reported can be biased depending on the particular source sequence used. In order to get more complete information about the system one needs to obtain a reasonable set of models which mirror the various kinds of sources encountered during video coding. A set of models which can be used to effectively model the various possible scenarios is provided. As this is somewhat tangential to the other work reported, the results are included as an appendix

Confucius Queue Management: Be Fair But Not Too Fast

When many users and unique applications share a congested edge link (e.g., a home network), everyone wants their own application to continue to perform well despite contention over network resources. Traditionally, network engineers have focused on fairness as the key objective to ensure that competing applications are equitably and led by the switch, and hence have deployed fair queueing mechanisms. However, for many network workloads today, strict fairness is directly at odds with equitable application performance. Real-time streaming applications, such as videoconferencing, suffer the most when network performance is volatile (with delay spikes or sudden and dramatic drops in throughput). Unfortunately, "fair" queueing mechanisms lead to extremely volatile network behavior in the presence of bursty and multi-flow applications such as Web traffic. When a sudden burst of new data arrives, fair queueing algorithms rapidly shift resources away from incumbent flows, leading to severe stalls in real-time applications. In this paper, we present Confucius, the first practical queue management scheme to effectively balance fairness against volatility, providing performance outcomes that benefit all applications sharing the contended link. Confucius outperforms realistic queueing schemes by protecting the real-time streaming flows from stalls in competing with more than 95% of websites. Importantly, Confucius does not assume the collaboration of end-hosts, nor does it require manual parameter tuning to achieve good performance

Design of a transport coding scheme for high-quality video over ATM networks

Caption title.Includes bibliographical references (p. 38-39).Supported by ARPA. F30602-92-C-0030 Supported by the Laboratory for Information and Decision Systems, Massachusetts Institute of Technology. DAAH04-95-1-0103V. Parthasarathy, J.W. Modestino and K.S. Vastola

Design and evaluation of a distributed control architecture over switched Ethernet in active filters

The area of power quality has received more and more attention during the last decade. Poor power quality is a growing problem, especially for the industry because it has a negative effect on production efficiency, power consumption and equipment life-span. Active filters are one of the more widespread solutions to these problems. An active filter is often sized and installed to compensate a specific load, based on a preceding power quality measurement. Often one system is not enough and multiple parallel systems must be used. This thesis investigates if it is possible to design a distributed control system where a number of filters work together and communicate using a switched Ethernet network. Such a distributed system can offer advantages such as better coordination and simplified configuration and operation. In the resulting distributed system the control tasks are split into two groups, power quality controllers and hardware controllers. The power quality controllers are executed by a master control computer and the resulting setpoint is distributed through the network to a number of slaves. The distributed system has been tested both through simulations and in a real-world implementation. Based on these tests it can be concluded that the distributed system works and that its performance is only marginally affected compared to the original system

Parallelization methodology for video coding - an implementation on the TMS320C80

This paper presents a parallelization methodology for video coding based on the philosophy of hiding as much communications by computation as possible. It models the task/data size, processor cache capacity, and communication contention, through a systematic decomposition and scheduling approach. With the aid of Petri-nets and task graphs for representation and analysis, it employs a triple buffering scheme to enable the functions of frame capture, management, and coding to be performed in parallel. The theoretical speedup analysis indicates that this method offers excellent communication hiding, resulting in system efficiency well above 90%. To prove its practicality, a H.261 video encoder has been implemented on a TMS320C80 system using the method. Its performance was measured, from which the speedup and efficiency figures were calculated. The only difference detected between the theoretical and measured data is the program control overhead that has not been accounted for in the theoretical model. Even with this, the measured speedup of the H.261 is 3.67 and 3.76 on four parallel processors (PPs) for QCIF and 352 × 240 video, respectively, which correspond to frame rate of 30.7 and 9.25 frames per second, and system efficiency of 91.8% and 94%, respectively. This method is particularly efficient for platforms with small number of parallel processors.published_or_final_versio

Analytical Models in Rail Transportation: An Annotated Bibliography

Not AvailableThis research has been supported, in part, by the U.S. Department of Transportation under contract DOT-TSC-1058, Transportation Advanced Research Program (TARP)