Novel irregular LDPC codes and their application to iterative detection of MIMO systems

Low-density parity-check (LDPC) codes are among the best performing error correction codes currently known. For higher performing irregular LDPC codes, degree distributions have been found which produce codes with optimum performance in the infinite block length case. Significant performance degradation is seen at more practical short block lengths. A significant focus in the search for practical LDPC codes is to find a construction method which minimises this reduction in performance as codes approach short lengths. In this work, a novel irregular LDPC code is proposed which makes use of the SPA decoder at the design stage in order to make the best choice of edge placement with respect to iterative decoding performance in the presence of noise. This method, a modification of the progressive edge growth (PEG) algorithm for edge placement in parity-check matrix (PCM) construction is named the DOPEG algorithm. The DOPEG design algorithm is highly flexible in that the decoder optimisation stage may be applied to any modification or extension of the original PEG algorithm with relative ease. To illustrate this fact, the decoder optimisation step was applied to the IPEG modification to the PEG algorithm, which produces codes with comparatively excellent performance. This extension to the DOPEG is called the DOIPEG. A spatially multiplexed coded iteratively detected and decoded multiple-input multiple-output (MIMO) system is then considered. The MIMO system to be investigated is developed through theory and a number of results are presented which illustrate its performance characteristics. The novel DOPEG code is tested for the MIMO system under consideration and a significant performance gain is achieved

Low-Density Parity-Check Coded High-order Modulation Schemes

In this thesis, we investigate how to support reliable data transmissions at high speeds in future communication systems, such as 5G/6G, WiFi, satellite, and optical communications. One of the most fundamental problems in these communication systems is how to reliably transmit information with a limited number of resources, such as power and spectral. To obtain high spectral efficiency, we use coded modulation (CM), such as bit-interleaved coded modulation (BICM) and delayed BICM (DBICM). To be specific, BICM is a pragmatic implementation of CM which has been largely adopted in both industry and academia. While BICM approaches CM capacity at high rates, the capacity gap between BICM and CM is still noticeable at lower code rates. To tackle this problem, DBICM, as a variation of BICM, introduces a delay module to create a dependency between multiple codewords, which enables us to exploit extrinsic information from the decoded delayed sub-blocks to improve the detection of the undelayed sub-blocks. Recent work shows that DBICM improves capacity over BICM. In addition, BICM and DBICM schemes protect each bit-channel differently, which is often referred to as the unequal error protection (UEP) property. Therefore, bit mapping designs are important for constructing pragmatic BICM and DBICM. To provide reliable communication, we have jointly designed bit mappings in DBICM and irregular low-density parity-check (LDPC) codes. For practical considerations, spatially coupled LDPC (SC-LDPC) codes have been considered as well. Specifically, we have investigated the joint design of the multi-chain SC-LDPC and the BICM bit mapper. In addition, the design of SC-LDPC codes with improved decoding threshold performance and reduced rate loss has been investigated in this thesis as well. The main body of this thesis consists of three parts. In the first part, considering Gray-labeled square M-ary quadrature amplitude modulation (QAM) constellations, we investigate the optimal delay scheme with the largest spectrum efficiency of DBICM for a fixed maximum number of delayed time slots and a given signal-to-noise ratio. Furthermore, we jointly optimize degree distributions and channel assignments of LDPC codes using protograph-based extrinsic information transfer charts. In addition, we proposed a constrained progressive edge growth-like algorithm to jointly construct LDPC codes and bit mappings for DBICM, taking the capacity of each bit-channel into account. Simulation results demonstrate that the designed LDPC-coded DBICM systems significantly outperform LDPC-coded BICM systems. In the second part, we proposed a windowed decoding algorithm for DBICM, which uses the extrinsic information of both the decoded delayed and undelayed sub-blocks, to improve the detection for all sub-blocks. We show that the proposed windowed decoding significantly outperforms the original decoding, demonstrating the effectiveness of the proposed decoding algorithm. In the third part, we apply multi-chain SC-LDPC to BICM. We investigate various connections for multi-chain SC-LDPC codes and bit mapping designs and analyze the performance of the multi-chain SC-LDPC codes over the equivalent binary erasure channels via density evolution. Numerical results demonstrate the superiority of the proposed design over existing connected-chain ensembles and over single-chain ensembles with the existing bit mapping design

Advances in Modeling and Signal Processing for Bit-Patterned Magnetic Recording Channels with Written-In Errors

In the past perpendicular magnetic recording on continuous media has served as the storage mechanism for the hard-disk drive (HDD) industry, allowing for growth in areal densities approaching 0.5 Tb/in2. Under the current system design, further increases are limited by the superparamagnetic effect where the medium's thermal energy destabilizes the individual bit domains used for storage. In order to provide for future growth in the area of magnetic recording for disk drives, a number of various technology shifts have been proposed and are currently undergoing considerable research. One promising option involves switching to a discrete medium in the form of individual bit islands, termed bit-patterned magnetic recording (BPMR).When switching from a continuous to a discrete media, the problems encountered become substantial for every aspect of the hard-disk drive design. In this dissertation the complications in modeling and signal processing for bit-patterned magnetic recording are investigated where the write and read processes along with the channel characteristics present considerable challenges. For a target areal density of 4 Tb/in2, the storage process is hindered by media noise, two-dimensional (2D) intersymbol interference (ISI), electronics noise and written-in errors introduced during the write process. Thus there is a strong possibility that BPMR may prove intractable as a future HDD technology at high areal densities because the combined negative effects of the many error sources produces an environment where current signal processing techniques cannot accurately recover the stored data. The purpose here is to exploit advanced methods of detection and error correction to show that data can be effectively recovered from a BPMR channel in the presence of multiple error sources at high areal densities.First a practical model for the readback response of an individual island is established that is capable of representing its 2D nature with a Gaussian pulse. Various characteristics of the readback pulse are shown to emerge as it is subjected to the degradation of 2D media noise. The writing of the bits within a track is also investigated with an emphasis on the write process's ability to inject written-in errors in the data stream resulting from both a loss of synchronization of the write clock and the interaction of the local-scale magnetic fields under the influence of the applied write field.To facilitate data recovery in the presence of BPMR's major degradations, various detection and error-correction methods are utilized. For single-track equalization of the channel output, noise prediction is incorporated to assist detection with increased levels of media noise. With large detrimental amounts of 2D ISI and media noise present in the channel at high areal densities, a 2D approach known as multi-track detection is investigated where multiple tracks are sensed by the read heads and then used to extract information on the target track. For BPMR the output of the detector still possesses the uncorrected written-in errors. Powerful error-correction codes based on finite geometries are employed to help recover the original data stream. Increased error-correction is sought by utilizing two-fold EG codes in combination with a form of automorphism decoding known as auto-diversity. Modifications to the parity-check matrices of the error-correction codes are also investigated for the purpose of attempting more practical applications of the decoding algorithms based on belief propagation. Under the proposed techniques it is shown that effective data recovery is possible at an areal density of 4 Tb/in2 in the presence of all significant error sources except for insertions and deletions. Data recovery from the BPMR channel with insertions and deletions remains an open problem

Reconciliation for Satellite-Based Quantum Key Distribution

This thesis reports on reconciliation schemes based on Low-Density Parity-Check (LDPC) codes in Quantum Key Distribution (QKD) protocols. It particularly focuses on a trade-off between the complexity of such reconciliation schemes and the QKD key growth, a trade-off that is critical to QKD system deployments. A key outcome of the thesis is a design of optimised schemes that maximise the QKD key growth based on finite-size keys for a range of QKD protocols. Beyond this design, the other four main contributions of the thesis are summarised as follows. First, I show that standardised short-length LDPC codes can be used for a special Discrete Variable QKD (DV-QKD) protocol and highlight the trade-off between the secret key throughput and the communication latency in space-based implementations. Second, I compare the decoding time and secret key rate performances between typical LDPC-based rate-adaptive and non-adaptive schemes for different channel conditions and show that the design of Mother codes for the rate-adaptive schemes is critical but remains an open question. Third, I demonstrate a novel design strategy that minimises the probability of the reconciliation process being the bottleneck of the overall DV-QKD system whilst achieving a target QKD rate (in bits per second) with a target ceiling on the failure probability with customised LDPC codes. Fourth, in the context of Continuous Variable QKD (CV-QKD), I construct an in-depth optimisation analysis taking both the security and the reconciliation complexity into account. The outcome of the last contribution leads to a reconciliation scheme delivering the highest secret key rate for a given processor speed which allows for the optimal solution to CV-QKD reconciliation