Development of a current limiting solid-state circuit breaker based on wide-band gap power semiconductor devices for 400V DC microgrid protection

Popularity of DC distribution systems is increasing for many residential and industrial applications such as data centres, commercial and residential buildings, telecommunication systems, and transport power networks etc. Compared to AC systems, they have demonstrated higher power efficiency, less complexity, and more readiness of integrating with various local power sources and DC electronic loads. However, one of the major technical issues hindering this trend is the lack of effective DC fault protection devices/circuits. Although conventional electromechanical circuit breakers work well in AC systems, they are not suitable for DC systems due to their long response time (ranging from tens of milliseconds to hundreds of milliseconds). Such a long response time is far beyond the withstand time (typically tens of microseconds) of most power electronic devices in short-circuit operating conditions. In contrast, Solid-State Circuit Breakers (SSCBs) are able to offer ultrafast switching speed thanks to the modern power semiconductor devices which can turn off in microseconds or even in tens of nanoseconds. Furthermore, the ever-increasing fault current level in DC systems poses a significant mechanical and thermal stress on the whole DC system. Therefore, the desire for the protection devices with the feature of fast switching speed along with the current-limiting capability has prompted intensive research in this area over the last decade in both academia and industry. However, the relatively high conduction losses and limited short-circuit capability are two of the major drawbacks of SSCBs. With the growing maturity and increasingly commercial availability of Wide-Bandgap (WBG) semiconductor devices, a SSCB based-on WBG devices is a promising solution to alleviate the issues since WBG semiconductors have demonstrated superior material properties over the conventional silicon material such as lower specific on-resistance, higher junction temperatures and higher breakdown voltage. This research aims to design and develop a WBG-based solid-state circuit breaker for a 400V DC microgrid application. To accomplish this task, this work starts with a comprehensive review of DC microgrid technology followed by an extensive review of the state-of-the-art DC circuit breakers. Then, to develop a circuit topology for the proposed SSCB, a practical current limiter is analysed, simulated, and evaluated. Based on this topology, the proposed SSCB is configured with a high-voltage normally-on Silicon Carbide Junction Field Effect Transistors (SiC-JFETs) cascading a low-voltage normally-off power MOSFET. This solution offers several advantages. For example, it does not require any additional sensing and tripping circuitry for short-circuit protection and therefore has a fast response speed. Meanwhile, the use of power SiC JFETs tends to reduce the conduction losses and enhance the short-circuit robustness of SSCBs. In addition, it offers the feature of current limiting which could ease the thermal and mechanical stresses on the whole DC system. The operating process of the proposed SSCB is analysed and the analytical results are compared with the simulated results; In the end, a prototype SSCB has been built and evaluated for short-circuit protection in a 400V DC system. In addition, to effectively suppress the overvoltage at the turn-off of SSCBs, a novel hybrid snubber circuit has been proposed by taking into account the advantages offered by both conventional Resistor-Capacitor-Diode (RCD) snubbers and Metal-Oxide Varistors (MOVs). Finally, other functions of the proposed SSCBs including overload protection, over temperature protection and protection coordination have been investigated and some operating issues such as false tripping and SSCB reset have been addressed

Research and technology highlights of the Lewis Research Center

Highlights of research accomplishments of the Lewis Research Center for fiscal year 1984 are presented. The report is divided into four major sections covering aeronautics, space communications, space technology, and materials and structures. Six articles on energy are included in the space technology section

GaN-based power devices: Physics, reliability, and perspectives

Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semicon- ductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spon- taneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high- voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench- structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main proper- ties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics

Miniaturized Transistors, Volume II

In this book, we aim to address the ever-advancing progress in microelectronic device scaling. Complementary Metal-Oxide-Semiconductor (CMOS) devices continue to endure miniaturization, irrespective of the seeming physical limitations, helped by advancing fabrication techniques. We observe that miniaturization does not always refer to the latest technology node for digital transistors. Rather, by applying novel materials and device geometries, a significant reduction in the size of microelectronic devices for a broad set of applications can be achieved. The achievements made in the scaling of devices for applications beyond digital logic (e.g., high power, optoelectronics, and sensors) are taking the forefront in microelectronic miniaturization. Furthermore, all these achievements are assisted by improvements in the simulation and modeling of the involved materials and device structures. In particular, process and device technology computer-aided design (TCAD) has become indispensable in the design cycle of novel devices and technologies. It is our sincere hope that the results provided in this Special Issue prove useful to scientists and engineers who find themselves at the forefront of this rapidly evolving and broadening field. Now, more than ever, it is essential to look for solutions to find the next disrupting technologies which will allow for transistor miniaturization well beyond silicon’s physical limits and the current state-of-the-art. This requires a broad attack, including studies of novel and innovative designs as well as emerging materials which are becoming more application-specific than ever before

Fast short-circuit protection for SiC MOSFETs in extreme short-circuit conditions by integrated functions in CMOS-ASIC technology

Wide bandgap power transistors such as SiC MOSFETs and HEMTs GaN push furthermore the classical compromises in power electronics. Briefly, significant gains have been demonstrated: better efficiency, coupled with an increase in power densities offered by the increase in switching frequency. HV SiC MOSFETs have specific features such as a low short-circuit SC withstand time capability compared to Si IGBTs and thinner gate oxide, and a high gate-to-source switching control voltage. The negative bias on the gate at the off-state creates additional stress which reduces the reliability of the SiC MOSFET. The high positive bias on the gate causes a large drain saturation current in the event of a SC. Thus, this technology gives rise to specific needs for ultrafast monitoring and protection. For this reason, the work of this thesis focuses on two studies to overcome these constraints, with the objective of reaching a good performance compromise between “CMS/ASIC-CMOS technological integration level-speed–robustness”. The first one, gathers a set of new solutions allowing a detection of the SC on the switching cycle, based on a conventional switch control architecture with two voltage levels. The second study is more exploratory and is based on a new gate-driver architecture, called multi-level, with low stress level for the SiC MOSFET while maintaining dynamic performances. The manuscript covers firstly the SiC MOSFET environment, (characterization and properties of SC behavior by simulation using PLECS and LTSpice software) and covers secondly a bibliographical study on the Gate drivers. And last, an in-depth study was carried out on SC type I & II (hard switch fault) (Fault under Load) and their respective detection circuits. A test bench, previously carried out in the laboratory, was used to complete and validate the analysis-simulation study and to prepare test stimuli for the design stage of new solutions. Inspired by the Gate charge method that appeared for Si IGBTs and evoked for SiC MOSFETs, this method has therefore been the subject of design, dimensioning and prototyping work, as a reference. This reference allows an HSF type detection in less than 200ns under 400V with 1.2kV components ranging from 80 to 120mOhm. Regarding new rapid and integrated detection methods, the work of this thesis focuses particularly on the design of a CMOS ASIC circuit. For this, the design of an adapted gate driver is essential. An ASIC is designed in X-Fab XT-0.18 SOICMOS technology under Cadence, and then packaged and assembled on a PCB. The PCB is designed for test needs and adaptable to the main bench. The design of the gate driver considered many functions (SC detection, SSD, segmented buffer, an "AMC", ...). From the SC detection point of view, the new integrated monitoring functions concern the VGS time derivative method which is based on a detection by an RC analog shunt circuit on the plateau sequence with two approaches: the first approach is based on a dip detection, i.e. the presence or not of the Miller plateau. The second approach is based on slope detection, i.e. the variability of the input capacitance of the power transistor under SC-HSF compared to normal operation. These methods are compared in the third chapter of the thesis, and demonstrate fault detection times between 40ns and 80ns, and preliminary robustness studies and critical cases are presented. A second new method is partially integrated in the ASIC, was designed. This method is not developed in the manuscript for valorization purposes. In addition to the main study, an exploratory study has focused on a modular architecture for close control at several bias voltage levels taking advantage of SOI isolation and low voltage CMOS transistors to drive SiC MOSFETs and improve their reliability through active and dynamic multi-level selection of switching sequences and on/off states

On-line Condition Monitoring, Fault Detection and Diagnosis in Electrical Machines and Power Electronic Converters

The objective of this PhD research is to develop robust, and non-intrusive condition monitoring methods for induction motors fed by closed-loop inverters. The flexible energy forms synthesized by these connected power electronic converters greatly enhance the performance and expand the operating region of induction motors. They also significantly alter the fault behavior of these electric machines and complicate the fault detection and protection. The current state of the art in condition monitoring of power-converter-fed electric machines is underdeveloped as compared to the maturing condition monitoring techniques for grid-connected electric machines. This dissertation first investigates the stator turn-to-turn fault modelling for induction motors (IM) fed by a grid directly. A novel and more meaningful model of the motor itself was developed and a comprehensive study of the closed-loop inverter drives was conducted. A direct torque control (DTC) method was selected for controlling IM’s electromagnetic torque and stator flux-linkage amplitude in industrial applications. Additionally, a new driver based on DTC rules, predictive control theory and fuzzy logic inference system for the IM was developed. This novel controller improves the performance of the torque control on the IM as it reduces most of the disadvantages of the classical and predictive DTC drivers. An analytical investigation of the impacts of the stator inter-turn short-circuit of the machine in the controller and its reaction was performed. This research sets a based knowledge and clear foundations of the events happening inside the IM and internally in the DTC when the machine is damaged by a turn fault in the stator. This dissertation also develops a technique for the health monitoring of the induction machine under stator turn failure. The developed technique was based on the monitoring of the off-diagonal term of the sequence component impedance matrix. Its advantages are that it is independent of the IM parameters, it is immune to the sensors’ errors, it requires a small learning stage, compared with NN, and it is not intrusive, robust and online. The research developed in this dissertation represents a significant advance that can be utilized in fault detection and condition monitoring in industrial applications, transportation electrification as well as the utilization of renewable energy microgrids. To conclude, this PhD research focuses on the development of condition monitoring techniques, modelling, and insightful analyses of a specific type of electric machine system. The fundamental ideas behind the proposed condition monitoring technique, model and analysis are quite universal and appeals to a much wider variety of electric machines connected to power electronic converters or drivers. To sum up, this PhD research has a broad beneficial impact on a wide spectrum of power-converter-fed electric machines and is thus of practical importance

Intelligent Circuits and Systems

ICICS-2020 is the third conference initiated by the School of Electronics and Electrical Engineering at Lovely Professional University that explored recent innovations of researchers working for the development of smart and green technologies in the fields of Energy, Electronics, Communications, Computers, and Control. ICICS provides innovators to identify new opportunities for the social and economic benefits of society.　 This conference bridges the gap between academics and R&D institutions, social visionaries, and experts from all strata of society to present their ongoing research activities and foster research relations between them. It provides opportunities for the exchange of new ideas, applications, and experiences in the field of smart technologies and finding global partners for future collaboration. The ICICS-2020 was conducted in two broad categories, Intelligent Circuits & Intelligent Systems and Emerging Technologies in Electrical Engineering

Power and Energy Student Summit 2019: 9 – 11 July 2019 Otto von Guericke University Magdeburg ; Conference Program

The book includes a short description of the conference program of the "Power and Energy Student Summit 2019". The conference, which is orgaized for students in the area of electric power systems, covers topics such as renewable energy, high voltage technology, grid control and network planning, power quality, HVDC and FACTS as well as protection technology. Besides the overview of the conference venue, activites and the time schedule, the book includes all papers presented at the conference

Soft-Switching Techniques of Power Conversion System in Automotive Chargers

abstract: This thesis investigates different unidirectional topologies for the on-board charger in an electric vehicle and proposes soft-switching solutions in both the AC/DC and DC/DC stage of the converter with a power rating of 3.3 kW. With an overview on different charger topologies and their applicability with respect to the target specification a soft-switching technique to reduce the switching losses of a single phase boost-type PFC is proposed. This work is followed by a modification to the popular soft-switching topology, the dual active bridge (DAB) converter for application requiring unidirectional power flow. The topology named as the semi-dual active bridge (S-DAB) is obtained by replacing the fully active (four switches) bridge on the load side of a DAB by a semi-active (two switches and two diodes) bridge. The operating principles, waveforms in different intervals and expression for power transfer, which differ significantly from the basic DAB topology, are presented in detail. The zero-voltage switching (ZVS) characteristics and requirements are analyzed in detail and compared to those of DAB. A small-signal model of the new configuration is also derived. The analysis and performance of S-DAB are validated through extensive simulation and experimental results from a hardware prototype. Secondly, a low-loss auxiliary circuit for a power factor correction (PFC) circuit to achieve zero voltage transition is also proposed to improve the efficiency and operating frequency of the converter. The high dynamic energy generated in the switching node during turn-on is diverted by providing a parallel path through an auxiliary inductor and a transistor placed across the main inductor. The paper discusses the operating principles, design, and merits of the proposed scheme with hardware validation on a 3.3 kW/ 500 kHz PFC prototype. Modifications to the proposed zero voltage transition (ZVT) circuit is also investigated by implementing two topological variations. Firstly, an integrated magnetic structure is built combining the main inductor and auxiliary inductor in a single core reducing the total footprint of the circuit board. This improvement also reduces the size of the auxiliary capacitor required in the ZVT operation. The second modification redirects the ZVT energy from the input end to the DC link through additional half-bridge circuit and inductor. The half-bridge operating at constant 50% duty cycle simulates a switching leg of the following DC/DC stage of the converter. A hardware prototype of the above-mentioned PFC and DC/DC stage was developed and the operating principles were verified using the same.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201