Replacing the automatic gain control loop in a mobile, digital TV broadcast receiver by a software based solution

The power level (the amplitude) of an electro-magnetic signal wave suffers from attenuation the greater the distance between the transmitter and the receiver is. The receiver of that signal therefore has components which try to amplify the signal so that it can be processed optimally by a processor. In a mobile or portable environment the signal power level can vary strongly, because the position of the receiver to the transmitter is not fixed. In order to compensate that movement a control loop exists, which dynamically is adapting the front-end to the right level. This work describes a new, software-based way to handle the signal level control loop (formerly automatic gain control) in a digital TV receiver. Starting with a very basic introduction into digital communications, including the description of the traditional front-end architecture, followed by a detailed description of the new method. Finally some conclusions of this new method are made which are giving an idea about how in the future it might be possible to reach better receiving performances using this mechanism

More dominant in their inactivity: consumer response and the adoption of digital TV in Australia

After much hesitation, discussion, and power brokering, Australia adopted digital TV for its Free-to air broadcasting on January 1, 2001. However, by December 2002, only a few thousand homes had adopted the technology. This paper examines the implementation and regulation of digital TV in Australia from the point of view of the &lsquo;established base&rsquo; the new technology will replace, theories on diffusion and innovation of new technologies, and the Justification Model, which sees technology choice as social gambling. It then evaluates the various protectionist regulations and limitations imposed on the technology to safeguard the various stakeholders, the implementation strategies used, lack of digital content, marketing efforts, negative media coverage, and the economic realities of the technology, and argues that if consumers reject the technology altogether, it would lead to Australia missing the future applications of digital technology and the opportunity to address the issue of the &lsquo;digital divide&rsquo; in the 21st century.<br /

CMOS RF front-end design for terrestrial and mobile digital television systems

With the increasing demand for high quality TV service, digital television (DTV) is replacing the conventional analog television. DTV tuner is one of the most critical blocks of the DTV receiver system; it down-converts the desired DTV RF channel to baseband or a low intermediate frequency with enough quality. This research is mainly focused on the analysis and realization of low-cost low-power front-ends for ATSC terrestrial DTV and DVB-H mobile DTV tuner systems. For the design of the ATSC terrestrial tuner, a novel double quadrature tuner architecture, which can not only minimize the tuner power consumption but also achieve the fully integration, has been proposed. A double quadrature down-converter has been designed and fabricated with TSMC 0.35õm CMOS technology; the measurement results verified the proposed concepts. For the mobile DTV tuner, a zero-IF architecture is used and it can achieve the DVB-H specifications with less than 200mW power consumption. In the implementation of the mobile DVB-H tuner, a novel RF variable gain amplifier (RFVGA) and a low flicker noise current-mode passive mixer have been proposed. The proposed RFVGA achieves high dynamic range and robust input impedance matching performance, which is the main design challenge for the traditional implementations. The current-mode passive mixer achieves high-gain, low noise (especially low flicker noise) and high-linearity (over 10dBm IIP3) with low power supplies; it is believed that this is a promising topology for low voltage high dynamic range mixer applications. The RFVGA has been fabricated in TSMC 0.18õm CMOS technology and the measurement results agree well with the theoretical ones

Utilizing Open Source in Terrestrial Digital TV Broadcasting

Indonesian terrestrial TV broadcasting has just started its migration to digital standard. Digitalization offers more roles for software development in various functional blocks of digital TV system. This paper presents utilization of open-source softwares in assessing some aspects of terrestrial digital TV system. We propose technical specification and measurement standard operating procedure for basic services using DVB-T standard, and set-up a softwarebased platform based on open source softwares for testing a DVB-T set-top-box

Broadcasting services amendment (Media Ownership) Bill 2006 and related bills

To help better explore the potential implications associated with the proposed legislation, we conducted a survey of 919 WA television viewers drawing from our TV Panel of 3000 viewers. Our panel has been recruited from a variety of sources including through lists acquired through marketing research firms, as well as direct mail and newspaper advertising recruitment drives. In many ways, our panel is better informed regarding future possibilities because they participate in regular studies where such scenarios are tested. In this way, the panel is better positioned to understand potential futures

Recent advances in the hardware architecture of flat display devices

Thesis (Master)--Izmir Institute of Technology, Electronics and Communication Engineering, Izmir, 2007Includes bibliographical References (leaves: 115-117)Text in English; Abstract: Turkish and Englishxiii, 133 leavesThesis will describe processing board hardware design for flat panel displays with integrated digital reception, the design challenges in flat panel displays with integrated digital reception explained with details. Thesis also includes brief explanation of flat panel technology and processing blocks. Explanations of building blocks of TV and flat panel displays are given before design stage for better understanding of design stage. Hardware design stage of processing board is investigated in two major steps, schematic design and layout design. First step of the schematic design is system level block diagram design. Schematic diagram is the detailed application level hardware design and layout is the implementation level of the design. System level, application level and implementation level hardware design of the TV processing board is described with details in thesis. Design challenges, considerations and solutions are defined in advance for flat panel displays

High definition systems in Japan

The successful implementation of a strategy to produce high-definition systems within the Japanese economy will favorably affect the fundamental competitiveness of Japan relative to the rest of the world. The development of an infrastructure necessary to support high-definition products and systems in that country involves major commitments of engineering resources, plants and equipment, educational programs and funding. The results of these efforts appear to affect virtually every aspect of the Japanese industrial complex. The results of assessments of the current progress of Japan toward the development of high-definition products and systems are presented. The assessments are based on the findings of a panel of U.S. experts made up of individuals from U.S. academia and industry, and derived from a study of the Japanese literature combined with visits to the primary relevant industrial laboratories and development agencies in Japan. Specific coverage includes an evaluation of progress in R&D for high-definition television (HDTV) displays that are evolving in Japan; high-definition standards and equipment development; Japanese intentions for the use of HDTV; economic evaluation of Japan's public policy initiatives in support of high-definition systems; management analysis of Japan's strategy of leverage with respect to high-definition products and systems

Tunable Balun Low-Noise Amplifier in 65nm CMOS Technology

The presented paper includes the design and implementation of a 65 nm CMOS low-noise amplifier (LNA) based on inductive source degeneration. The amplifier is realized with an active balun enabling a single-ended input which is an important requirement for low-cost system on chip implementations. The LNA has a tunable bandpass characteristics from 4.7 GHz up to 5.6 GHz and a continuously tunable gain from 22 dB down to 0 dB, which enables the required flexibility for multi-standard, multi-band receiver architectures. The gain and band tuning is realized with an optimized tunable active resistor in parallel to a tunable L-C tank amplifier load. The amplifier achieves an IIP3 linearity of -8dBm and a noise figure of 2.7 dB at the highest gain and frequency setting with a low power consumption of 10 mW. The high flexibility of the proposed LNA structure together with the overall good performance makes it well suited for future multi-standard low-cost receiver front-ends