Integrated GHz silicon photonic interconnect with micrometer-scale modulators and detectors

We report an optical link on silicon using micrometer-scale ring-resonator enhanced silicon modulators and waveguide-integrated germanium photodetectors. We show 3 Gbps operation of the link with 0.5 V modulator voltage swing and 1.0 V detector bias. The total energy consumption for such a link is estimated to be ~120 fJ/bit. Such compact and low power monolithic link is an essential step towards large-scale on-chip optical interconnects for future microprocessors

Optical interconnect solution with plasmonic modulator and Ge photodetector array

We report on an optical chip-to-chip interconnect solution, thereby demonstrating plasmonics as a solution for ultra-dense, high-speed short-reach communications. The interconnect comprises a densely integrated plasmonic Mach-Zehnder modulator array that is packaged with standard driving electronics. On the receiver side, a germanium photodetector array is integrated with trans-impedance amplifiers. A multicore fiber provides a compact optical interface to the array. We demonstrate 4 × 20 Gb/s on-off keying signaling with direct detection.ISSN:1041-1135ISSN:1941-017

A 3 Gb/s optical detector in standard CMOS for 850 nm optical communication

This paper presents a monolithic optical detector, consisting of an integrated photodiode and a preamplifier in a standard 0.18-/spl mu/m CMOS technology. A data rate of 3 Gb/s at BER <10/sup -11/ was achieved for /spl lambda/=850 nm with 25-/spl mu/W peak-peak optical power. This data rate is more than four times than that of current state-of-the-art optical detectors in standard CMOS reported so far. High-speed operation is achieved without reducing circuit responsivity by using an inherently robust analog equalizer that compensates (in gain and phase) for the photodiode roll-off over more than three decades. The presented solution is applicable to various photodiode structures, wavelengths, and CMOS generations

Photonics design tool for advanced CMOS nodes

Recently, the authors have demonstrated large-scale integrated systems with several million transistors and hundreds of photonic elements. Yielding such large-scale integrated systems requires a design-for-manufacture rigour that is embodied in the 10 000 to 50 000 design rules that these designs must comply within advanced complementary metal-oxide semiconductor manufacturing. Here, the authors present a photonic design automation tool which allows automatic generation of layouts without design-rule violations. This tool is written in SKILL, the native language of the mainstream electric design automation software, Cadence. This allows seamless integration of photonic and electronic design in a single environment. The tool leverages intuitive photonic layer definitions, allowing the designer to focus on the physical properties rather than on technology-dependent details. For the first time the authors present an algorithm for removal of design-rule violations from photonic layouts based on Manhattan discretisation, Boolean and sizing operations. This algorithm is not limited to the implementation in SKILL, and can in principle be implemented in any scripting language. Connectivity is achieved with software-defined waveguide ports and low-level procedures that enable auto-routing of waveguide connections.Comment: 5 pages, 10 figure

Photonic-electronic integration with polysilicon photonics in bulk CMOS

Here, I review the development of a polysilicon photonic platform that is optimized for integration with electronics fabricated on bulk silicon wafers. This platform enables large-scale monolithic integration of silicon photonics with microelectronics. A single-polysilicon deposition and lithography mask were used to simultaneously define the transistor gate, the low-loss waveguides, the depletion modulators, and the photodetectors. Several approaches to reduce optical scattering and mitigate defect state absorption are presented. Waveguide propagation loss as low as 3 dB/cm could be realized in front-end polysilicon with an end-of-line loss as low as 10 dB/cm at 1280nm. The defect state density could be enhanced to enable all-silicon, infrared photodetectors. The resulting microring resonant detectors exhibit over 20% quantum efficiency with 9.7 GHz bandwidth over a wide range of wavelengths. A complete photonic link has been demonstrated at 5 Gbps that transfers digital information from one bulk CMOS photonics chip to another.United States. Defense Advanced Research Projects Agency. Photonically Optimized Embedded Microprocessors Program (Award HR0011-11-C-0100

Performance Evaluation of an Integrated Optoelectronic Receiver

AbstractThis work describes the optical and electrical characterization of an integrated optoelectronic receiver. The receiver is composed of a photodiode and a transimpedance amplifier, both fabricated in silicon technology using a 0.8μm BiCMOS process. The total area occupied by the photodiode is of 10,000μm2. In a first step, the generated photocurrent of the photodiode is measured for the wavelengths of 780nm and 830nm at different levels of optical power. In a second step, the responsivity and quantum efficiency parameters of the photodiode are computed. Finally, an electrical measurement including the transimpedance amplifier is achieved. A potential application for this optoelectronic receiver is on the first optical communications window

Monolithically integrated, broadband, high-efficiency silicon nitride-on-silicon waveguide photodetectors in a visible-light integrated photonics platform

Visible and near-infrared spectrum photonic integrated circuits are quickly becoming a key technology to address the scaling challenges in quantum information and biosensing. Thus far, integrated photonic platforms in this spectral range have lacked integrated photodetectors. Here, we report silicon nitride-on-silicon waveguide photodetectors that are monolithically integrated in a visible light photonic platform on silicon. Owing to a leaky-wave silicon nitride-on-silicon design, the devices achieved a high external quantum efficiency of >60% across a record wavelength span from λ ~ 400 nm to ~640 nm, an opto-electronic bandwidth up to 9 GHz, and an avalanche gain-bandwidth product up to 173 ± 30 GHz. As an example, a photodetector was integrated with a wavelength-tunable microring in a single chip for on-chip power monitoring

Investigating thermal dependence on monolithically-integrated photonic interconnects

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references (p. 59-61).Monolithically-integrated optical link is a disruptive technology which has the promising potential to remove memory bandwidth bottleneck in the deep multicore regime. Although with the advantages of high bandwidth-density and energy-efficiency, it comes with design challenges from device, architecture and system perspectives. High thermal sensitivity of the essential optical ring resonator imposes constraints on the applicability of optical links in the electro-optical systems. To investigate the thermal dynamics as well as to develop advanced ring thermal-tuning mechanisms, real-time thermal monitoring at design stage is required. In this work we propose a thermal simulation platform which integrates system modeling aspects including the high-level architectural performance model, the physical device evaluation model, and the thermal analysis model. By introducing the compact thermal model with linear transient thermal analysis solver, system thermal dynamics can be monitored at high efficiency. We demonstrate the temperature profile of a multi-core microprocessor system running real workloads. The evaluation results show the system thermal dependence on the manufacturing process, circuit thermal crosstalk and integrated ring heater efficiency.by Yu-Hsin Chen.S.M

Silicon-Organic Hybrid (SOH) Mach-Zehnder Modulators for 100 Gbit/s On-Off Keying

Electro-optic modulators for high-speed on-off keying (OOK) are key components of short- and mediumreach interconnects in data-center networks. Besides small footprint and cost-efficient large-scale production, small drive voltages and ultra-low power consumption are of paramount importance for such devices. Here we demonstrate that the concept of silicon-organic hybrid (SOH) integration is perfectly suited for meeting these challenges. The approach combines the unique processing advantages of large-scale silicon photonics with unrivalled electro-optic (EO) coefficients obtained by molecular engineering of organic materials. In our proof-of-concept experiments, we demonstrate generation and transmission of OOK signals with line rates of up to 100 Gbit/s using a 1.1 mm-long SOH Mach-Zehnder modulator (MZM) which features a {\pi}-voltage of only 0.9 V. This experiment represents not only the first demonstration of 100 Gbit/s OOK on the silicon photonic platform, but also leads to the lowest drive voltage and energy consumption ever demonstrated at this data rate for a semiconductor-based device. We support our experimental results by a theoretical analysis and show that the nonlinear transfer characteristic of the MZM can be exploited to overcome bandwidth limitations of the modulator and of the electric driver circuitry. The devices are fabricated in a commercial silicon photonics line and can hence be combined with the full portfolio of standard silicon photonic devices. We expect that high-speed power-efficient SOH modulators may have transformative impact on short-reach optical networks, enabling compact transceivers with unprecedented energy efficiency that will be at the heart of future Ethernet interfaces at Tbit/s data rates