15 research outputs found

    A two-stage power amplifier design for ultra-wideband applications

    Get PDF
    In this paper, a two-stage 0.18 μm CMOS power amplifier (PA) for ultra-wideband (UWB) 3 to 5 GHz based on common source inductive degeneration with an auxiliary amplifier is proposed. In this proposal, an auxiliary amplifier is used to place the 2nd harmonic in the core amplified in order to make up for the gain progression phenomena at the main amplifier output node. Simulation results show a power gain of 16 dB with a gain flatness of 0.4 dB and an input 1 dB compression of about -5 dBm from 3 to 5 GHz using a 1.8 V power supply consuming 25 mW. Power added efficiency (PAE) of around 47% at 4 GHz with 50 Ω load impedance was also observed

    A Novel Power-Scalable Wideband Power Amplifier Linearization Technique

    Get PDF
    Global mobile traffic is expected to continue to increase at an astonishing rate in the future, due to the ever-increasing number of mobile phone subscribers and the adoption of smart devices which generate significantly more mobile traffic. To satisfy this growth in demand, it is envisioned that future 5th Generation (5G) mobile networks will utilize lower powered small-cell base stations and base stations with large antenna arrays to greatly improve network coverage and capacity. A power amplifier (PA) is a critical component in a base station’s transmitter, required to boost the signal power such that it is high enough for transmission to the intended receiver. The design of the PA for 5G base stations, however, presents new challenges to designers. When driven with modern wideband communication signals, the PA must be both efficient and linear in order to minimize power consumption, improve reliability, maintain transmission accuracy, and avoid interference with neighbouring signals. In conventional high-powered macrocell base station designs, the aforementioned requirements are usually satisfied using a two-step procedure. First, the PA is designed using a Doherty power amplifier (DPA) topology, which has high efficiency, but poor linearity. Then, digital predistortion (DPD) linearization techniques are applied to ensure that the DPA attains the required linearity performance. However, for the lower-powered PAs needed in small cells and large antenna arrays, the relatively high power overhead of DPD techniques, which does not scale down as the power range of the PA decreases, make them unattractive PA linearization solutions. In response, a new PA linearization technique is proposed and developed in this thesis. It is based on the design and addition of a linearization amplifier (LA), an approach which can help the PA attain the required linearity even when it is driven with modern communication signals with very wide bandwidths. Of particular note, the LA’s power consumption is relatively low, it scales with the PA’s power range, and it does not increase with signal bandwidth. These qualities make it highly suitable for use with PAs in future 5G small-cell base stations and base stations with large antenna arrays. To validate the proposed technique’s effectiveness, a prototype circuit was designed, fabricated and applied to a high peak efficiency 6 W class AB PA with a centre frequency of 850 MHz. When stimulated by a wideband 40 MHz signal, the PA’s adjacent channel leakage ratio (ACLR) was improved by up to 13 dB after the addition of the LA. This enabled the PA to achieve an ACLR of about -45 dBc without the use of any other linearization techniques. Significant ACLR improvements were also observed for signals with even wider bandwidths of up to 160 MHz. Moreover, it was shown that the LA could be used in conjunction with a simple predistorter to further improve the efficiency and linearity of the class AB PA. Next, the LA is augmented with a conventional DPA design to form a new linear DPA topology that was able to achieve a better linearity-efficiency trade-off compared to the linearized class AB PA. To accomplish this, a study of the interactions between the LA and DPA circuitries was conducted and a design strategy was developed to determine the circuit parameters that maximized ACLR improvement while minimizing power consumption. For validation purposes, this strategy was applied to design a proof-of-concept prototype with a centre frequency of 800 MHz and a peak envelope power of 12 W. With the addition of the LA, a more than 11 dB improvement of the ACLR was obtained at the prototype’s output when it was driven with signals with up to 40 MHz of modulation bandwidth: an ACLR of about -45 dBc or better was achieved over wide average power range. As expected, the efficiency of the linear DPA topology remained significantly higher than the linearized class AB PA for all signals tested. Another challenge faced in particular by PAs in a large antenna array, is that it will experience dynamic load impedance variations due to antenna coupling. This unwanted variation in the load impedance can cause instability and significant distortions at the output of the PA that is difficult to remedy using conventional techniques. To address these issues, it is shown in the last part of this thesis that the LA can be used to mitigate this problem by minimizing the amount of load impedance variation seen by the PA due to antenna coupling, such that it remains closer to its optimal value, and by maintaining excellent linearization across a wide range of load impedance values

    Wideband CMOS Data Converters for Linear and Efficient mmWave Transmitters

    Get PDF
    With continuously increasing demands for wireless connectivity, higher\ua0carrier frequencies and wider bandwidths are explored. To overcome a limited transmit power at these higher carrier frequencies, multiple\ua0input multiple output (MIMO) systems, with a large number of transmitters\ua0and antennas, are used to direct the transmitted power towards\ua0the user. With a large transmitter count, each individual transmitter\ua0needs to be small and allow for tight integration with digital circuits. In\ua0addition, modern communication standards require linear transmitters,\ua0making linearity an important factor in the transmitter design.In this thesis, radio frequency digital-to-analog converter (RF-DAC)-based transmitters are explored. They shift the transition from digital\ua0to analog closer to the antennas, performing both digital-to-analog\ua0conversion and up-conversion in a single block. To reduce the need for\ua0computationally costly digital predistortion (DPD), a linear and wellbehaved\ua0RF-DAC transfer characteristic is desirable. The combination\ua0of non-overlapping local oscillator (LO) signals and an expanding segmented\ua0non-linear RF-DAC scaling is evaluated as a way to linearize\ua0the transmitter. This linearization concept has been studied both for\ua0the linearization of the RF-DAC itself and for the joint linearization of\ua0the cascaded RF-DAC-based modulator and power amplifier (PA) combination.\ua0To adapt the linearization, observation receivers are needed.\ua0In these, high-speed analog-to-digital converters (ADCs) have a central\ua0role. A high-speed ADC has been designed and evaluated to understand\ua0how concepts used to increase the sample rate affect the dynamic performance

    Caracterização, modelação e compensação de efeitos de memória lenta em amplificadores de potência baseados em GAN HEMTS

    Get PDF
    Gallium nitride (GaN) high-electron-mobility transistors (HEMTs) have emerged as the most compelling technology for the transmission of highpower radio-frequency (RF) signals for cellular mobile communications and radar applications. However, despite their remarkable power capabilities, the deployment of GaN HEMT-based RF power amplifiers (PAs) in the mobile communications infrastructure is often ruled out in favor of alternative siliconbased technologies. One of the main reasons for this is the pervasiveness of nonlinear long-term memory effects in GaN HEMT technology caused by thermal and charge-trapping phenomena. While these effects can be compensated for using sophisticated digital predistortion algorithms, their implementation and model-extraction complexity—as well as the power necessary for their real-time execution—make them unsuitable for modern small cells and large-scale multiple-input multiple-output transceivers, where the power necessary for the linearization of each amplification element is of great concern. In order to address these issues and further the deployment of high-powerdensity high-efficiency GaN HEMT-based RF PAs in next-generation communications and radar applications, in this thesis we propose novel methods for the characterization, modeling, and compensation of long-term memory effects in GaN HEMT-based RF PAs. More specifically, we propose a method for the characterization of the dynamic self-biasing behavior of GaN HEMTbased RF PAs; multiple behavioral models of charge trapping and their implementation as analog electronic circuits for the accurate real-time prediction of the dynamic variation of the threshold voltage of GaN HEMTs; a method for the compensation of the pulse-to-pulse instability of GaN HEMT-based RF PAs for radar applications; and a hybrid analog/digital scheme for the linearization of GaN HEMT-based RF PAs for next-generation communications applications.Os transístores de alta mobilidade eletrónica de nitreto de gálio (GaN HEMTs) são considerados a tecnologia mais atrativa para a transmissão de sinais de radiofrequência de alta potência para comunicações móveis celulares e aplicações de radar. No entanto, apesar das suas notáveis capacidades de transmissão de potência, a utilização de amplificadores de potência (PAs) baseados em GaN HEMTs é frequentemente desconsiderada em favor de tecnologias alternativas baseadas em transístores de silício. Uma das principais razões disto acontecer é a existência pervasiva na tecnologia GaN HEMT de efeitos de memória lenta causados por fenómenos térmicos e de captura eletrónica. Apesar destes efeitos poderem ser compensados através de algoritmos sofisticados de predistorção digital, estes algoritmos não são adequados para transmissores modernos de células pequenas e interfaces massivas de múltipla entrada e múltipla saída devido à sua complexidade de implementação e extração de modelo, assim como a elevada potência necessária para a sua execução em tempo real. De forma a promover a utilização de PAs de alta densidade de potência e elevada eficiência baseados em GaN HEMTs em aplicações de comunicação e radar de nova geração, nesta tese propomos novos métodos de caracterização, modelação, e compensação de efeitos de memória lenta em PAs baseados em GaN HEMTs. Mais especificamente, nesta tese propomos um método de caracterização do comportamento dinâmico de autopolarização de PAs baseados em GaN HEMTs; vários modelos comportamentais de fenómenos de captura eletrónica e a sua implementação como circuitos eletrónicos analógicos para a previsão em tempo real da variação dinâmica da tensão de limiar de condução de GaN HEMTs; um método de compensação da instabilidade entre pulsos de PAs baseados em GaN HEMTs para aplicações de radar; e um esquema híbrido analógico/digital de linearização de PAs baseados em GaN HEMTs para comunicações de nova geração.Programa Doutoral em Telecomunicaçõe

    Digital Predistorion of 5G Millimeter-Wave Active Phased Arrays using Artificial Neural Networks

    Get PDF

    Baseband linearization schemes for high efficiency power amplifiers

    Get PDF
    High efficiency and high linearity microwave power amplifiers (PAs) are a critical element in modern wireless applications. Over recent years, modern communica-tions systems and the complex modulated signals they use have presented signif-icant challenges in terms of maintaining acceptable efficiency and achieving the high degrees of linearity required in microwave radio frequency power amplifier (RFPA) designs. The next ‘big’ challenge is the deployment of the fifth-generation (5G) mobile network, which is scheduled for commercial launch in 2020. Although the specification for 5G is not completely known at this point, the expectations in terms of what 5G will bring most certainly are; including 1000x more capacity, less than 1ms latency and 100x network energy efficiency. New 5G systems will need to provide higher spectral efficiency, wide and fragmented signal spectra and dy-namic spectrum access (DSA). As a result, the waveforms used in 5G systems will be characterised by high peak to average power ratio (PAPR) and high bandwidth, especially for high data rate applications, which brings additional challenges in terms of achieving system efficiency and linearity. Digital Predistortion (DPD) has been widely and very successfully applied in modern communication systems to linearize PAs and meet system require-ments. However, as the signal bandwidth widens and carrier aggregation be-comes commonplace in 5G system, higher complexity DPD algorithms and an Abstract II increased number of associated parameters will be required. This will inevitably result in a more complex DPD systems with higher power consumption and overall, lower system efficiency. This is especially problematic when systems advance into massive multiple-input, multiple-output (MIMO) scenarios, where the distrib-uted systems are smaller in size and massive in number. The research work in this thesis starts by analysing the different nonlinear distortion mechanisms present in the typical microwave power transistor devices that would be deployed in an RFPA within a 5G system. A tunable analytical device model is established to investigate the individual contributions of key nonlinear el-ements in the device. A number of important observations, such as “sweet-spots”, sideband asymmetry and drive dependent optimum baseband termination have been discovered and analysed in detail. Using the developed analytical model, a linearity optimization strategy in circuit design has been discussed and applied to a commercially available and widely used nonlinear device model CGH60015D from Cree (now Wolfspeed). For the first time, a systematic study of all main non-linear components has been done and the interaction between these components has been discussed. In the second part of the thesis, a pair of novel system-level envelope do-main linearization techniques are presented and analysed. They are applied at the input node and output node of the power amplifier, respectively. The envelop line-arization techniques have been demonstrated with both the analytical model, de-veloped in this thesis, and the nonlinear device model CGH60015D. The Abstract III advantages of envelope linearization has been discussed as well as the challenges such an approach presents. The Linearizability of a system, both in terms of circuit design and lineariza-tion techniques are discussed. In fact, linearity and linearizability of power amplifi-ers forms the central thread that runs through this thesis together with linearity, which provides guidance for a top-to-bottom level PA linearization strategy

    Vidutinių dažnių 5G belaidžių tinklų galios stiprintuvų tyrimas

    Get PDF
    This dissertation addresses the problems of ensuring efficient radio fre-quency transmission for 5G wireless networks. Taking into account, that the next generation 5G wireless network structure will be heterogeneous, the device density and their mobility will increase and massive MIMO connectivity capability will be widespread, the main investigated problem is formulated – increasing the efficiency of portable mid-band 5G wireless network CMOS power amplifier with impedance matching networks. The dissertation consists of four parts including the introduction, 3 chapters, conclusions, references and 3 annexes. The investigated problem, importance and purpose of the thesis, the ob-ject of the research methodology, as well as the scientific novelty are de-fined in the introduction. Practical significance of the obtained results, defended state-ments and the structure of the dissertation are also included. The first chapter presents an extensive literature analysis. Latest ad-vances in the structure of the modern wireless network and the importance of the power amplifier in the radio frequency transmission chain are de-scribed in detail. The latter is followed by different power amplifier archi-tectures, parameters and their improvement techniques. Reported imped-ance matching network design methods are also discussed. Chapter 1 is concluded distinguishing the possible research vectors and defining the problems raised in this dissertation. The second chapter is focused around improving the accuracy of de-signing lumped impedance matching network. The proposed methodology of estimating lumped inductor and capacitor parasitic parameters is dis-cussed in detail provi-ding complete mathematical expressions, including a summary and conclusions. The third chapter presents simulation results for the designed radio fre-quency power amplifiers. Two variations of Doherty power amplifier archi-tectures are presented in the second part, covering the full step-by-step de-sign and simulation process. The latter chapter is concluded by comparing simulation and measurement results for all designed radio frequency power amplifiers. General conclusions are followed by an extensive list of references and a list of 5 publications by the author on the topic of the dissertation. 5 papers, focusing on the subject of the discussed dissertation, have been published: three papers are included in the Clarivate Analytics Web of Sci-ence database with a citation index, one paper is included in Clarivate Ana-lytics Web of Science database Conference Proceedings, and one paper has been published in unreferred international conference preceedings. The au-thor has also made 9 presentations at 9 scientific conferences at a national and international level.Dissertatio
    corecore