Model order reduction techniques for circuit simulation

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.Includes bibliographical references.by ?Luís Miguel Silveira.Ph.D

Model order reduction techniques for circuit simulation

Includes bibliographical references (p. 156-160).Supported in part by the Semiconductor Research Corporation. SRC 93-SJ-558 Supported in part by the National Science Foundation / Advanced Research Projects Agency. MIP 91-17724Luis Miguel Silveira

Digital-flutter-suppression-system investigations for the active flexible wing wind-tunnel model

Active flutter suppression control laws were designed, implemented, and tested on an aeroelastically-scaled wind tunnel model in the NASA Langley Transonic Dynamics Tunnel. One of the control laws was successful in stabilizing the model while the dynamic pressure was increased to 24 percent greater than the measured open-loop flutter boundary. Other accomplishments included the design, implementation, and successful operation of a one-of-a-kind digital controller, the design and use of two simulation methods to support the project, and the development and successful use of a methodology for on-line controller performance evaluation

An improved switching converter model

The nonlinear modeling and analysis of dc-dc converters in the continuous mode and discontinuous mode was done by averaging and discrete sampling techniques. A model was developed by combining these two techniques. This model, the discrete average model, accurately predicts the envelope of the output voltage and is easy to implement in circuit and state variable forms. The proposed model is shown to be dependent on the type of duty cycle control. The proper selection of the power stage model, between average and discrete average, is largely a function of the error processor in the feedback loop. The accuracy of the measurement data taken by a conventional technique is affected by the conditions at which the data is collected

Application of LSI to signal detection: The deltic DFPCC

The development of the DELTIC DFPCC serial mode signal processor is discussed. The processor is designed to detect in the presence of background noise a signal coded into the zero crossings of the waveform. The unique features of the DELTIC DFPCC include versatility in handling a variety of signals and relative simplicity in implementation. A theoretical performance model is presented which predicts the expected value of the output signal as a function of the input signal to noise ratio. Experimental results obtained with the prototype system, which was breadboarded with LSI, MSI and SSI components, are given. The device was compared with other LSI schemes for signal processing and it was concluded that the DELTIC DFPCC is simpler and in some cases more versatile than other systems. With established LSI technology, low frequency systems applicable to sonar and similar problems are feasible

Shuttle Ku-band signal design study

Carrier synchronization and data demodulation of Unbalanced Quadriphase Shift Keyed (UQPSK) Shuttle communications' signals by optimum and suboptimum methods are discussed. The problem of analyzing carrier reconstruction techniques for unbalanced QPSK signal formats is addressed. An evaluation of the demodulation approach of the Ku-Band Shuttle return link for UQPSK when the I-Q channel power ratio is large is carried out. The effects that Shuttle rocket motor plumes have on the RF communications are determined also. The effect of data asymmetry on bit error probability is discussed

Investigation into PRS-precoded, constant-envelope, continuous-phase digital modulation schemes

Bibliography: leaves 78-79.Partial response signaling ( PRS) has been used successfully to improve the spectral properties of Pulse Amplitude Modulated (PAM) digital transmission systems. This thesis investigation studied the effect of PRS on frequency- and phase-modulated carrier systems, in particular on their spectral performance and their maintenance of constant envelope

A development study for a short range, low capacity digital microwave link

Includes bibliographical references.A specific request for development of a short-range, low capacity digital microwave transmission system has been received from the South African Dept. Posts and Telecommunications. The aim of this project is to initiate development work by determining the optimum system configuration and modulation technique to meet the design specifications. In addition, it is proposed to develop and construct an I.F. modulator/demodulator module using which simulation tests chosen modulation application may be performed in order to assess the scheme's feasibi1ity in this specific application

Ultra-Low-Power Sensors and Receivers for IoT Applications

The combination of ultra-low power analog front-ends and CMOS-compatible transducers enable new applications, such as environmental monitors, household appliances, health trackers, etc. that are seamlessly integrated into our daily lives. Furthermore, wireless connectivity allows many of these sensors to operate both independently and collectively. These techniques collectively fulfil the recent surge of internet-of-things (IoT) applications that have the potential to fundamentally change daily life for millions of people.In this dissertation, the circuit and system design of wireless receivers and sensors is presented that explores the challenges of implementing long lifespan, high accuracy, and large coverage range IoT sensor networks. The first is a wake-up receiver (WuRX), which continuously monitors the RF environment to wake up a higher-power radio upon detection of a predetermined RF signature. This work both improves sensitivity and reduces power over prior art through a multi-faceted design featuring an impedance transformation network with large passive voltage gain, an active envelope detector with high input impedance to facilitate large passive voltage gain, a low-power precision comparator, and a low-leakage digital baseband correlator.Although pushing the prior WuRX performance boundary by orders of magnitude, the first work shows moderate sensitivity, inferior temperature robustness, and large area with external lumped components. Thus, the second work shows a miniaturized WuRX that is temperature-compensated, yet still consumes only nano-watt power and millimeter area while operating at 9 GHz. To further reduce the area, a global common-mode feedback is utilized across the envelope detector and baseband amplifier that eliminates the need for off-chip ac-coupling components. Multiple temperature-compensation techniques are proposed to maintain constant bandwidth of the signal path and constant clock frequency. Both WuRXs operate at 0.4 V supply, consume near-zero power and achieve ~-70 dBm sensitivity.Lastly, the first reported CMOS 2-in-1 relative humidity and temperature sensor is presented. A unified analog front-end interfaces on-chip transducers and converts the inputs into a frequency vis a high-linearity frequency-locked loop. An incomplete-settling switched-capacitor-based Wheatstone bridge is proposed to sense the inputs in a power-efficient fashion