Evaluation Of 28nm 10 Bit Adc Using Ramp And Sinusoidal Histogram Methodologies

ADC production testing has become more challenging due to more stringent test procedure for new generation of ADC. The trend for silicon cost is going down while the cost of test is going up. Therefore, to reduce the cost of test and preserve the test accuracy is essential for high volume testing in production. This research is conducted for accurate ADC testing using histogram methodologies. Histogram methodology is the most common test procedure used in high volume production testing. In the past there were a lot of studies on testing the ADC but there were no emphasizing on various histogram methodologies for high volume testing. This research objective is to develop test solutions for 28nm 10 bit ADC using histogram methodologies. The outcome from this research has clearly shows that the test program that has been developed is able to segregate the good and bad devices. 98.18% of the devices are able to pass the ADC testing while remaining 1.82% fail the ADC test. It was found that Ramp Histogram and Sinusoidal Histogram method has achieved this research objective as both methodologies shows similar result based on comparison that has been made. It was known that accurate ADC testing requires large sample size. This research found that multi-site testing was able to compensate the drawback in histogram methodologies. The result shows that multi-site testing is 63.72% more efficient in term of ADC testing time

The test ability of an adaptive pulse wave for ADC testing

In the conventional ADC production test method, a high-quality analogue sine wave is applied to the Analogue-to-Digital Converter (ADC), which is expensive to generate. Nowadays, an increasing number of ADCs are integrated into a system-on-chip (SoC) platform design, which usually contains a digital embedded processor. In such a platform, a digital pulse wave is obviously less expensive to generate than an accurate analogue sine wave. As a result, the usage of a digital pulse wave has been investigated to test ADCs as the test stimulus. In this paper, the ability of a digital adaptive pulse wave for ADC testing is presented via the measurement results. Instead of the conventional FFT analysis, a time-domain analysis is exploited for post-processing, from which a signature result can be obtained. This signature can distinguish between faulty devices and the fault-free devices. It is also used in the machine-learning-based test method to predict the dynamic specifications of the ADC. The experimental results of a 12-bit 80 M/s pipelined ADC are shown to evaluate the sensitivity and accuracy of using a pulse wave to test an ADC

Random Generation of Arbitrary Waveforms for Emulating Three-Phase Systems

This paper describes an apparatus for generating a signal representative of steady-state and transient disturbances in three-phase waveforms of an ac electrical system as described in IEEE Std 1159-09. It can be configured as a synthesizer of randomly distorted signals for different applications: for testing the effects of disturbed grid on equipment and to generate patterns of electrical disturbances for the training of artificial neural networks, which are used for measuring power quality tasks. For the first purpose, voltage and current amplifiers are added in the output stage, which allows the generation of disturbed signals at grid level.Comisión Interministerial de Ciencia y Tecnología DPI2006-15467-C02-01Comisión Interministerial de Ciencia y Tecnología DPI2006-15467-C02-0

Characterization of Dielectric Barrier Discharge Plasma Actuators: Logarithmic Thrust-Voltage Quadratic Relationship

Results of thrust measurements of dielectric barrier discharge plasma actuators are presented. The test setup, measurement, and data processing methodology that were developed in prior work were used. The tests were conducted with high-density polyethylene actuators of three thicknesses. The applied voltage driving the actuators was a pure sinusoidal waveform. The test setup was a suspended actuator with a decoupling liquid interface. The tests were conducted at low ambient humidity. The thrust was measured with an analytical balance and the results were corrected for antithrust to isolate the plasma-generated thrust. Applying this approach resulted in smooth and repeatable data. It also enabled precise curve fitting that yielded quadratic relations between the plasma thrust and voltage in loglog space at constant frequencies. The results contrast power law relationships developed in literature that now appear to be an approximation only over a limited voltage range

Ultrafast voltage sampling using single-electron wavepackets

We demonstrate an ultrafast voltage sampling technique using a stream of electron wavepackets. Electrons are emitted from a single-electron pump and travel through electron waveguides towards a detector potential barrier. Our electrons sample an instantaneous voltage on the gate upon arrival at the detector barrier. Fast sampling is achieved by minimising the duration that the electrons interact with the barrier, which can be made as small as a few picoseconds. The value of the instan- taneous voltage can be determined by varying the gate voltage to match the barrier height to the electron energy, which is used as a stable reference. The test waveform can be reconstructed by shifting the electron arrival time against it. Although we find that the our current system is limited by the experimental line bandwidth to 12–18 GHz, we argue that this method has scope to increase the bandwidth of voltage sampling to 100 GHz and beyond

AWG Having Arbitrary Factor Interpolator and Fixed Frequency DAC Sampling Clock

An AWG includes a waveform memory providing a digital waveform signal at a sample rate and an arbitrary factor interpolator (AFI) coupled to receive the digital waveform signal or a processed digital waveform signal. A complex mixer for carrier modulation is coupled to the AFI which outputs a complex band pass signal. A DAC is coupled to an ouput of the complex mixer for receiving the complex band pass signal to provide an analog output signal. A fixed frequency sample clock clocks the DAC to provide a fixed DAC sample rate. The DAC provides a data clock signal to a sample request controller that generates a sample request signal that is coupled to the waveform memory for requesting the digital waveform signal form the waveform memory. The interpolated digital signal is sampled at the fixed DAC sample rate independent of the sample rate of digital waveform signal