YARTISS: A Generic, Modular and Energy-Aware Scheduling Simulator for Real-Time Multiprocessor Systems

In this report, we present a free software written in Java, YARTISS, which is a real-time multiprocessor scheduling simulator. It is aimed at comparing user-customized algorithms with ones from the literature on real-time scheduling. This simulator is designed as an easy-to-use modular tool in which new modules can be added without the need to decompress, edit nor recompile existing parts. It can sim-ulate the execution of a large number of concurrent periodic independent tasksets on multiprocessor platforms and generate clear visual results of the scheduling process (both schedules and tunable metrics presentations). Other task models are already implemented in the simulator, like graph tasks with precedence constraints and it is easily extensible to other task models. Moreover, YARTISS can simulate tasksets in which energy consumption is a scheduling parameter in the same manner as Worst Case Execution Time (WCET)

Discrete Event Simulations

Considered by many authors as a technique for modelling stochastic, dynamic and discretely evolving systems, this technique has gained widespread acceptance among the practitioners who want to represent and improve complex systems. Since DES is a technique applied in incredibly different areas, this book reflects many different points of view about DES, thus, all authors describe how it is understood and applied within their context of work, providing an extensive understanding of what DES is. It can be said that the name of the book itself reflects the plurality that these points of view represent. The book embraces a number of topics covering theory, methods and applications to a wide range of sectors and problem areas that have been categorised into five groups. As well as the previously explained variety of points of view concerning DES, there is one additional thing to remark about this book: its richness when talking about actual data or actual data based analysis. When most academic areas are lacking application cases, roughly the half part of the chapters included in this book deal with actual problems or at least are based on actual data. Thus, the editor firmly believes that this book will be interesting for both beginners and practitioners in the area of DES

Simulation modelling software approaches to manufacturing problems

Increased competition in many industries has resulted in a greater emphasis on developing and using advanced manufacturing systems to improve productivity and reduce costs. The complexity and dynamic behaviour of such systems, make simulation modelling one of the most popular methods to facilitate the design and assess operating strategies of these systems. The growing need for the use of simulation is reflected by a growth in the number of simulation languages and data-driven simulators in the software market. This thesis investigates which characteristics typical manufacturing simulators possess, and how the user requirements can be better fulfilled. For the purpose of software evaluation, a case study has been carried out on a real manufacturing system. Several simulation models of an automated system for electrostatic powder coating have been developed using different simulators. In addition to the evaluation of these simulators, a comprehensive evaluation framework has been developed to facilitate selection of simulation software for modelling manufacturing systems. Different hierarchies of evaluation criteria have been established for different software purposes. In particular, the criteria that have to be satisfied for users in education differ from those for users in industry. A survey has also been conducted involving a number of users of software for manufacturing simulation. The purpose of the survey was to investigate users' opinions about simulation software, and the features that they desire to be incorporated in simulation software. A methodology for simulation software selection is also derived. It consists of guidelines related to the actions to be taken and factors to be considered during the evaluation and selection of simulation software. On the basis of all the findings, proposals on how manufacturing simulators can be improved are made, both for use in education and in industry. These software improvements should result in a reduction in the amount of time and effort needed for simulation model development, and therefore make simulation more beneficial

Computer-Integrated Design and Manufacture of Integrated Circuits

Contains research goals and objectives, reports on sixteen research projects and a list of publications.Defense Advanced Research Projects Agency/U.S. Navy Contract N00174-93-K-0035Defense Advanced Research Projects Agency/U.S. Army Contract DABT 63-95-C-0088Multisponsored Projects Industrial/MIT Leaders for Manufacturing Progra

Reducing main memory access latency through SDRAM address mapping techniques and access reordering mechanisms

As the performance gap between microprocessors and memory continues to increase, main memory accesses result in long latencies which become a factor limiting system performance. Previous studies show that main memory access streams contain significant localities and SDRAM devices provide parallelism through multiple banks and channels. These locality and parallelism have not been exploited thoroughly by conventional memory controllers. In this thesis, SDRAM address mapping techniques and memory access reordering mechanisms are studied and applied to memory controller design with the goal of reducing observed main memory access latency. The proposed bit-reversal address mapping attempts to distribute main memory accesses evenly in the SDRAM address space to enable bank parallelism. As memory accesses to unique banks are interleaved, the access latencies are partially hidden and therefore reduced. With the consideration of cache conflict misses, bit-reversal address mapping is able to direct potential row conflicts to different banks, further improving the performance. The proposed burst scheduling is a novel access reordering mechanism, which creates bursts by clustering accesses directed to the same rows of the same banks. Subjected to a threshold, reads are allowed to preempt writes and qualified writes are piggybacked at the end of the bursts. A sophisticated access scheduler selects accesses based on priorities and interleaves accesses to maximize the SDRAM data bus utilization. Consequentially burst scheduling reduces row conflict rate, increasing and exploiting the available row locality. Using a revised SimpleScalar and M5 simulator, both techniques are evaluated and compared with existing academic and industrial solutions. With SPEC CPU2000 benchmarks, bit-reversal reduces the execution time by 14% on average over traditional page interleaving address mapping. Burst scheduling also achieves a 15% reduction in execution time over conventional bank in order scheduling. Working constructively together, bit-reversal and burst scheduling successfully achieve a 19% speedup across simulated benchmarks

Software Performance Engineering using Virtual Time Program Execution

In this thesis we introduce a novel approach to software performance engineering that is based on the execution of code in virtual time. Virtual time execution models the timing-behaviour of unmodified applications by scaling observed method times or replacing them with results acquired from performance model simulation. This facilitates the investigation of "what-if" performance predictions of applications comprising an arbitrary combination of real code and performance models. The ability to analyse code and models in a single framework enables performance testing throughout the software lifecycle, without the need to to extract performance models from code. This is accomplished by forcing thread scheduling decisions to take into account the hypothetical time-scaling or model-based performance specifications of each method. The virtual time execution of I/O operations or multicore targets is also investigated. We explore these ideas using a Virtual EXecution (VEX) framework, which provides performance predictions for multi-threaded applications. The language-independent VEX core is driven by an instrumentation layer that notifies it of thread state changes and method profiling events; it is then up to VEX to control the progress of application threads in virtual time on top of the operating system scheduler. We also describe a Java Instrumentation Environment (JINE), demonstrating the challenges involved in virtual time execution at the JVM level. We evaluate the VEX/JINE tools by executing client-side Java benchmarks in virtual time and identifying the causes of deviations from observed real times. Our results show that VEX and JINE transparently provide predictions for the response time of unmodified applications with typically good accuracy (within 5-10%) and low simulation overheads (25-50% additional time). We conclude this thesis with a case study that shows how models and code can be integrated, thus illustrating our vision on how virtual time execution can support performance testing throughout the software lifecycle

Toward digital twins for sawmill production planning and control : benefits, opportunities and challenges

Sawmills are key elements of the forest product industry supply chain, and they play important economic, social, and environmental roles. Sawmill production planning and control are, however, challenging owing to severalfactors, including, but not limited to, the heterogeneity of the raw material. The emerging concept of digital twins introduced in the context of Industry 4.0 has generated high interest and has been studied in a variety of domains, including production planning and control. In this paper, we investigate the benefits digital twins would bring to the sawmill industry via a literature review on the wider subject of sawmill production planning and control. Opportunities facilitating their implementation, as well as ongoing challenges from both academic and industrial perspectives, are also studied