48,760 research outputs found

    Uncovering Bugs in Distributed Storage Systems during Testing (not in Production!)

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    Testing distributed systems is challenging due to multiple sources of nondeterminism. Conventional testing techniques, such as unit, integration and stress testing, are ineffective in preventing serious but subtle bugs from reaching production. Formal techniques, such as TLA+, can only verify high-level specifications of systems at the level of logic-based models, and fall short of checking the actual executable code. In this paper, we present a new methodology for testing distributed systems. Our approach applies advanced systematic testing techniques to thoroughly check that the executable code adheres to its high-level specifications, which significantly improves coverage of important system behaviors. Our methodology has been applied to three distributed storage systems in the Microsoft Azure cloud computing platform. In the process, numerous bugs were identified, reproduced, confirmed and fixed. These bugs required a subtle combination of concurrency and failures, making them extremely difficult to find with conventional testing techniques. An important advantage of our approach is that a bug is uncovered in a small setting and witnessed by a full system trace, which dramatically increases the productivity of debugging

    Functional Requirements-Based Automated Testing for Avionics

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    We propose and demonstrate a method for the reduction of testing effort in safety-critical software development using DO-178 guidance. We achieve this through the application of Bounded Model Checking (BMC) to formal low-level requirements, in order to generate tests automatically that are good enough to replace existing labor-intensive test writing procedures while maintaining independence from implementation artefacts. Given that existing manual processes are often empirical and subjective, we begin by formally defining a metric, which extends recognized best practice from code coverage analysis strategies to generate tests that adequately cover the requirements. We then formulate the automated test generation procedure and apply its prototype in case studies with industrial partners. In review, the method developed here is demonstrated to significantly reduce the human effort for the qualification of software products under DO-178 guidance

    Model Checker Execution Reports

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    Software model checking constitutes an undecidable problem and, as such, even an ideal tool will in some cases fail to give a conclusive answer. In practice, software model checkers fail often and usually do not provide any information on what was effectively checked. The purpose of this work is to provide a conceptual framing to extend software model checkers in a way that allows users to access information about incomplete checks. We characterize the information that model checkers themselves can provide, in terms of analyzed traces, i.e. sequences of statements, and safe cones, and present the notion of execution reports, which we also formalize. We instantiate these concepts for a family of techniques based on Abstract Reachability Trees and implement the approach using the software model checker CPAchecker. We evaluate our approach empirically and provide examples to illustrate the execution reports produced and the information that can be extracted

    Virtual bloXing - assembly rapid prototyping for near net shapes

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    Virtual reality (VR) provides another dimension to many engineering applications. Its immersive and interactive nature allows an intuitive approach to study both cognitive activities and performance evaluation. Market competitiveness means having products meet form, fit and function quickly. Rapid Prototyping and Manufacturing (RP&M) technologies are increasingly being applied to produce functional prototypes and the direct manufacturing of small components. Despite its flexibility, these systems have common drawbacks such as slow build rates, a limited number of build axes (typically one) and the need for post processing. This paper presents a Virtual Assembly Rapid Prototyping (VARP) project which involves evaluating cognitive activities in assembly tasks based on the adoption of immersive virtual reality along with a novel nonlayered rapid prototyping for near net shape (NNS) manufacturing of components. It is envisaged that this integrated project will facilitate a better understanding of design for manufacture and assembly by utilising equivalent scale digital and physical prototyping in one rapid prototyping system. The state of the art of the VARP project is also presented in this paper

    Virtual assembly rapid prototyping of near net shapes

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    Virtual reality (VR) provides another dimension to many engineering applications. Its immersive and interactive nature allows an intuitive approach to study both cognitive activities and performance evaluation. Market competitiveness means having products meet form, fit and function quickly. Rapid Prototyping and Manufacturing (RP&M) technologies are increasingly being applied to produce functional prototypes and the direct manufacturing of small components. Despite its flexibility, these systems have common drawbacks such as slow build rates, a limited number of build axes (typically one) and the need for post processing. This paper presents a Virtual Assembly Rapid Prototyping (VARP) project which involves evaluating cognitive activities in assembly tasks based on the adoption of immersive virtual reality along with a novel non-layered rapid prototyping for near net shape (NNS) manufacturing of components. It is envisaged that this integrated project will facilitate a better understanding of design for manufacture and assembly by utilising equivalent scale digital and physical prototyping in one rapid prototyping system. The state of the art of the VARP project is also presented in this paper

    Immunotronics - novel finite-state-machine architectures with built-in self-test using self-nonself differentiation

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    A novel approach to hardware fault tolerance is demonstrated that takes inspiration from the human immune system as a method of fault detection. The human immune system is a remarkable system of interacting cells and organs that protect the body from invasion and maintains reliable operation even in the presence of invading bacteria or viruses. This paper seeks to address the field of electronic hardware fault tolerance from an immunological perspective with the aim of showing how novel methods based upon the operation of the immune system can both complement and create new approaches to the development of fault detection mechanisms for reliable hardware systems. In particular, it is shown that by use of partial matching, as prevalent in biological systems, high fault coverage can be achieved with the added advantage of reducing memory requirements. The development of a generic finite-state-machine immunization procedure is discussed that allows any system that can be represented in such a manner to be "immunized" against the occurrence of faulty operation. This is demonstrated by the creation of an immunized decade counter that can detect the presence of faults in real tim

    Software reliability through fault-avoidance and fault-tolerance

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    The use of back-to-back, or comparison, testing for regression test or porting is examined. The efficiency and the cost of the strategy is compared with manual and table-driven single version testing. Some of the key parameters that influence the efficiency and the cost of the approach are the failure identification effort during single version program testing, the extent of implemented changes, the nature of the regression test data (e.g., random), and the nature of the inter-version failure correlation and fault-masking. The advantages and disadvantages of the technique are discussed, together with some suggestions concerning its practical use

    Research study on multi-KW-DC distribution system

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    A detailed definition of the HVDC test facility and the equipment required to implement the test program are provided. The basic elements of the test facility are illustrated, and consist of: the power source, conventional and digital supervision and control equipment, power distribution harness and simulated loads. The regulated dc power supplies provide steady-state power up to 36 KW at 120 VDC. Power for simulated line faults will be obtained from two banks of 90 ampere-hour lead-acid batteries. The relative merits of conventional and multiplexed power control will be demonstrated by the Supervision and Monitor Unit (SMU) and the Automatically Controlled Electrical Systems (ACES) hardware. The distribution harness is supported by a metal duct which is bonded to all component structures and functions as the system ground plane. The load banks contain passive resistance and reactance loads, solid state power controllers and active pulse width modulated loads. The HVDC test facility is designed to simulate a power distribution system for large aerospace vehicles
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