Filling polygonal holes with bicubic patches

Consider a bicubic rectangular patch complex which surrounds an n-sided hole in R3. Then the problem of filling the hole with n bicubic rectangular patches is studied

Smooth parametric surfaces and n-sided patches

The theory of 'geometric continuity' within the subject of CAGD is reviewed. In particular, we are concerned with how parametric surface patches for CAGD can be pieced together to form a smooth Ck surface. The theory is applied to the problem of filling an n-sided hole occurring within a smooth rectangular patch complex. A number of solutions to this problem are surveyed

Normal subgroups of mapping class groups and the metaconjecture of Ivanov

We prove that if a normal subgroup of the extended mapping class group of a closed surface has an element of sufficiently small support then its automorphism group and abstract commensurator group are both isomorphic to the extended mapping class group. The proof relies on another theorem we prove, which states that many simplicial complexes associated to a closed surface have automorphism group isomorphic to the extended mapping class group. These results resolve the metaconjecture of N.V. Ivanov, which asserts that any "sufficiently rich" object associated to a surface has automorphism group isomorphic to the extended mapping class group, for a broad class of such objects. As applications, we show: (1) right-angled Artin groups and surface groups cannot be isomorphic to normal subgroups of mapping class groups containing elements of small support, (2) normal subgroups of distinct mapping class groups cannot be isomorphic if they both have elements of small support, and (3) distinct normal subgroups of the mapping class group with elements of small support are not isomorphic. Our results also suggest a new framework for the classification of normal subgroups of the mapping class group.Comment: 57 pages, 11 figure

Ultra high speed image processing techniques

Packaging techniques for ultra high speed image processing were developed. These techniques involve the development of a signal feedthrough technique through LSI/VLSI sapphire substrates. This allows the stacking of LSI/VLSI circuit substrates in a 3 dimensional package with greatly reduced length of interconnecting lines between the LSI/VLSI circuits. The reduced parasitic capacitances results in higher LSI/VLSI computational speeds at significantly reduced power consumption levels

High order continuous polygonal patches

A polygonal patch method is described which can be used to fill a polygonal hole within a given k'th order continuous rectangular patch complex. The method is relatively easy to implement, since it only re- quires Ck extensions of the rectangular patch complex defined in terms of the rectangular patch parameterizations. The method is illustrated by reference to C2 bicubic B-spline surfaces

Planarization and fabrication of bridges across deep groves or holes in silicon using a dry film photoresist followed by an etch back

A technique is presented that provides planarization after a very deep etching step in silicon. This offers the possibility for not only resist spinning and layer patterning but also for realization of bridges and cantilevers across deep grooves or holes. The technique contains a standard dry film lamination step to cover a wafer with a 38 mu m thick foil. Next the foil is etched back to the desired thickness of a few micrometres. This thin film facilitates resist spinning and high-resolution patterning. The planarization method is demonstrated by the fabrication of aluminium bridges across a deep groove in silicon

Active and passive component embedding into low-cost plastic substrates aimed at smart system applications

The technology development for a low-cost, roll-to-roll compatible chip embedding process is described in this paper. Target applications are intelligent labels and disposable sensor patches. Two generations of the technology are depicted. In the first version of the embedding technology, the chips are embedded in an adhesive layer between a copper foil and a PET film. While this results in a very thin (< 200 µm) and flexible system, the single-layer routing and the incompatibility with passive components restricts the application of this first generation. The double-sided circuitry embedding technology is an extension of the single-sided, foil-based chip embedding, where the PET film is replaced by a second metal foil. To obtain sufficient mechanical strength and to further reduce cost, the adhesive film is replaced by a substrate material which is compatible with the chip embedding concept. Both versions of the foil-based embedding technology are very versatile, as they are compatible with a broad range of polymer materials, for which the specifications can be tuned to the final application