114 research outputs found

    Reconfigurable RF Front End Components for Multi-Radio Platform Applications

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    The multi-service requirements of the 3G and 4G communication systems, and their backward compatibility requirements, create challenges for the antenna and RF front-end designs with multi-band and wide-band techniques. These challenges include: multiple filters, which are lossy, bulky, and expensive, are needed in the system; device board size limitation and the associated isolation problems caused by the limited space and crowd circuits; and the insertion loss issues created by the single-pole-multi-through antenna switch. As will be shown, reconfigurable antennas can perform portions of the filter functions, which can help solve the multiple filters problem. Additionally, reconfigurable RF circuits can decrease the circuit size and output ports, which can help solve board size limitation, and isolation and antenna switch insertion loss issues. To validate the idea that reconfigurable antennas and reconfigurable RF circuits are a viable option for multi-service communication system, a reconfigurable patch antenna, a reconfigurable monopole antenna, and a reconfigurable power amplifier (PA) have been developed. All designs adapt state-of-the-art techniques. For the reconfigurable antenna designs, an experiment demonstrating its advantages, such as jamming signal resistance, has been performed. Reconfigurable antennas provide a better out-ofoperating- band noise performance than the multi-band antennas design, decreasing the need for filters in the system. A full investigation of reconfigurable antennas, including the single service reconfigurable antenna, the mixed signal service reconfigurable antenna, and the multi-band reconfigurable antenna, has been completed. The design challenges, which include switches investigation, switches integration, and service grouping techniques, have been discussed. In the reconfigurable PA portion, a reconfigurable PA structure has first been demonstrated, and includes a reconfigurable output matching network (MN) and a reconfigurable die design. To validate the proposed reconfigurable PA structure, a reconfigurable PA for a 3G cell phone system has been designed with a multi-chip module technique. The reconfigurable PA structure can significantly decrease the real-estate, cost, and complexity of the PA design. Further, by decreasing the number of output ports, the number of poles for the antenna switch will be decreased as well, leading to an insertion loss decrease

    Conception d'un circuit d'adaptation d'impédance reconfigurable pour la téléphonie mobile

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    Adaptive RF front-ends : providing resilience to changing environments

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    4.5-/4.9-GHz-Band Selective High-Efficiency GaN HEMT Power Amplifier by Characteristic Impedance Switching

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    A 4.5-/4.9-GHz band-selective GaN HEMT high-efficiency power amplifier has been designed and evaluated for next-generation wireless communication systems. An optimum termination impedance for each high-efficiency operation band was changed by using PIN diodes inserted into a harmonic treatment circuit at the output side. In order to minimize the influence of the insertion loss of the PIN diodes, an additional line is arranged in parallel with the open-ended stub used for second harmonic treatment, and the line and stub are connected with the PIN diodes to change the effective characteristic impedance. The fabricated GaN HEMT amplifier achieved a maximum power-added efficiency of 57% and 66% and a maximum drain efficiency of 62% and 70% at 4.6 and 5.0GHz, respectively, with a saturated output power of 38dBm, for each switched condition

    Concurrent dual-band high efficiency class-E power amplifier

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    RECONFIGURABLE POWER AMPLIFIER WITH TUNABLE INTERSTAGE MATCHING NETWORK USING GaAs MMIC AND SURFACE-MOUNT TECHNOLOGY

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    As the demand of reconfigurable devices increases, the possibility of exploiting the interstage matching network in a two-stage amplifier to provide center frequency tuning capability is explored. While placement of tuning elements at the input and/or output matching network has some disadvantages, placement of tuning elements in the interstage absorbs the lossy components characteristics into useful attributes. The circuit design methodology includes graphical method to determine the bandpass topology that achieves high Q-contour on the Smith chart thus result in narrow bandwidth. T-section and π-section topologies are used to match reactive terminations provided by the first and second amplifier stages. The design methodology also includes utilization of interstage mismatch loss that decreases as increasing frequency to compensate for amplifier gain roll-off and equalize the gain at different tuning states. In prototype realization, three design configurations are discussed in this thesis: 1) a discrete design for operation between 0.1 – 0.9 GHz with the total layout area of 7.5 mm x 12.5 mm, 2) a partial monolithic design (Quasi-MMIC) for operation between 0.9 – 2.4 GHz that is 25 times smaller layout area compared to the discrete design, and 3) a conceptual design of integrated monolithic reconfigurable PA for operation between 0.9 – 2.4 GHz that is 130 times smaller layout area compared to the discrete design. One variant of the fabricated reconfigurable PA offers advantage of 4-states center frequency tuning from 1.37 GHz to 1.95 GHz with gain of 21.5 dB (+ 0.7 dB). The feasibility of interstage matching network as tuning elements in reconfigurable power amplifier has been explored. The input and output matching networks are fixed while the interstage impedances are varied using electronic switching (discrete SP4T and GaAs FET switches). The discrete design is suited for the operation at low frequency (fo < 1GHz), while monolithic implementation of the tunable interstage matching network is required for higher frequency operation due to size limitation and parasitic effects. The reconfigurable PA using MMIC tuner was designed at higher frequency to possibly cover GSM, CDMA, Bluetooth, and WiMAX frequency (0.9 – 2.4 GHz)

    Dual-band and switched-band highly efficient power amplifiers

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    The Power Amplifier is the most challenging module of a wireless network to design and it is the highest power consumer. Lots of research has been dedicated to design highly efficient and linear power amplifiers. The high demand for wireless communication systems creates the requirement for multiband transmitters and receivers. Providing high efficiency for power amplifiers in multiband applications is even more challenging. The work presented in this thesis is focused on designing high efficiency frequency adaptive power amplifiers. Frequency adaptive power amplifiers are categorized in three groups: broadband, multi-band and switched-band power amplifiers. Two main design methodologies of frequency adaptive power amplifiers are proposed in this thesis. They are dual-band and switched-band power amplifiers. The advantages and limitations of their output performances are evaluated. The main goals in this thesis are achieving high efficiency and required output power over all working bands and maintaining consistent performance over the bandwidth. In the dual-band power amplifiers, the distributed matching network is designed without any switches. Both of the switched-band Class-E power amplifiers have switched shunt capacitor values. The results demonstrate the tradeoffs between achieving consistent high performance in each band and introducing losses and complexity in the switching design

    Concurrent dual-band high efficiency class-E power amplifier

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