SIMULASI PERANGKAT IMPLAN KOKLEA DENGAN CONTINUOUS INTERLEAVE SAMPLING

Perangkat bantu dengar implan koklea telah diketahui dapat membantu penyandang tuna rungu mempersepsikan suara secara signifikan. Perangkat ini terdiri atas bagian eksternal dan internal, masing-masing berfungsi untuk  menangkap sinyal suara serta mengolah sinyal suara menjadi sinyal listrik yang akan digunakan untuk menstimulasi saraf-saraf pendengaran. Salah satu skema pengolahan sinyal yang umum dipakai pada perangkat implan koklea adalah Continuous Interleave Sampling (CIS), yang memisahkan frekuensi sinyal suara asli menjadi beberapa frekuensi untuk menstimulasi koklea manusia pada titik-titik berbeda. Pada makalah ini, cara kerja implan koklea dengan skema CIS disimulasikan menggunakan peranti lunak LabView. Hasil simulasi menunjukkan bahwa sinyal yang disintesis dari sinyal asli yang telah diproses dengan delapan filter sesuai skema CIS dapat dipersepsikan oleh subjek tes berpendengaran normal. Peningkatan jumlah filter hingga 12 buah tidak menambah inteligibilitas sinyal hasil sintesis, sebaliknya penggunaan kurang dari 5 (lima) filter akan mengakibatkan sinyal hasil sintesis sulit dipahami. Kata kunci: implan koklea, continuous interleave sampling, simulasi ujara

Speech filtering for improving intelligibility in noisy transients

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis.Includes bibliographical references.Hearing impairment is a problem that affects a large percentage of the population. Cochlear implants allow those with profound or total hearing loss to regain some hearing by stimulating auditory nerve fibers with implanted electrodes, in response to sound picked up by an external microphone. The signal processing chain from microphone input to stimulation output is an important factor in the overall speech intelligibility of the implant system. This thesis work improves on an existing ultra-low-power cochlear implant system by utilizing an improved noise and power efficient bandpass filter bank to implement a novel frequency-selective gain control algorithm capable of reducing, and in some cases removing, loud transient noises, thereby improving speech intelligibility. This gain control algorithm takes advantage of the inherent frequency-specific gain control afforded by the improved bandpass filter topology. This contribution makes an improvement to the existing state-of-the-art system in both power efficiency and performance.by Andrew Lewine.M.Eng

Low-Power Circuits for Brain–Machine Interfaces

This paper presents work on ultra-low-power circuits for brain–machine interfaces with applications for paralysis prosthetics, stroke, Parkinson’s disease, epilepsy, prosthetics for the blind, and experimental neuroscience systems. The circuits include a micropower neural amplifier with adaptive power biasing for use in multi-electrode arrays; an analog linear decoding and learning architecture for data compression; low-power radio-frequency (RF) impedance-modulation circuits for data telemetry that minimize power consumption of implanted systems in the body; a wireless link for efficient power transfer; mixed-signal system integration for efficiency, robustness, and programmability; and circuits for wireless stimulation of neurons with power-conserving sleep modes and awake modes. Experimental results from chips that have stimulated and recorded from neurons in the zebra finch brain and results from RF power-link, RF data-link, electrode- recording and electrode-stimulating systems are presented. Simulations of analog learning circuits that have successfully decoded prerecorded neural signals from a monkey brain are also presented

Ultra-low-power circuits and systems for wearable and implantable medical devices

Thesis (Ph. D.)--Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references (pages 219-231).Advances in circuits, sensors, and energy storage elements have opened up many new possibilities in the health industry. In the area of wearable devices, the miniaturization of electronics has spurred the rapid development of wearable vital signs, activity, and fitness monitors. Maximizing the time between battery recharge places stringent requirements on power consumption by the device. For implantable devices, the situation is exacerbated by the fact that energy storage capacity is limited by volume constraints, and frequent battery replacement via surgery is undesirable. In this case, the design of energy-efficient circuits and systems becomes even more crucial. This thesis explores the design of energy-efficient circuits and systems for two medical applications. The first half of the thesis focuses on the design and implementation of an ultra-low-power, mixed-signal front-end for a wearable ECG monitor in a 0.18pm CMOS process. A mixed-signal architecture together with analog circuit optimizations enable ultra-low-voltage operation at 0.6V which provides power savings through voltage scaling, and ensures compatibility with state-of-the-art DSPs. The fully-integrated front-end consumes just 2.9[mu]W, which is two orders of magnitude lower than commercially available parts. The second half of this thesis focuses on ultra-low-power system design and energy-efficient neural stimulation for a proof-of-concept fully-implantable cochlear implant. First, implantable acoustic sensing is demonstrated by sensing the motion of a human cadaveric middle ear with a piezoelectric sensor. Second, alternate energy-efficient electrical stimulation waveforms are investigated to reduce neural stimulation power when compared to the conventional rectangular waveform. The energy-optimal waveform is analyzed using a computational nerve fiber model, and validated with in-vivo ECAP recordings in the auditory nerve of two cats and with psychophysical tests in two human cochlear implant users. Preliminary human subject testing shows that charge and energy savings of 20-30% and 15-35% respectively are possible with alternative waveforms. A system-on-chip comprising the sensor interface, reconfigurable sound processor, and arbitrary-waveform neural stimulator is implemented in a 0.18[mu]m high-voltage CMOS process to demonstrate the feasibility of this system. The sensor interface and sound processor consume just 12[mu]W of power, representing just 2% of the overall system power which is dominated by stimulation. As a result, the energy savings from using alternative stimulation waveforms transfer directly to the system.by Marcus Yip.Ph.D

29th Annual Computational Neuroscience Meeting: CNS*2020

Meeting abstracts This publication was funded by OCNS. The Supplement Editors declare that they have no competing interests. Virtual | 18-22 July 202