183 research outputs found

    Analysis of a hysteresis-controlled self-oscillating class-D amplifier

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    This paper gives the first systematic perturbation analysis of the audio distortion and mean switching period for a self-oscillating class-D amplifier. Explicit expressions are given for all the principal components of audio distortion, for a general audio input signal; the specific example of a sinusoidal input is also discussed in some detail, yielding an explicit closed-form expression for the total harmonic distortion (THD). A class-D amplifier works by converting a low-frequency audio input signal to a high-frequency train of rectangular pulses, whose widths are slowly modulated according to the audio signal. The audiofrequency components of the pulse-train are designed to agree with those of the audio signal. In many varieties of class-D amplifier, the pulse-train is generated using a carrier wave of fixed frequency, well above the audio range. In other varieties, as here, there is no such fixed-frequency clock, and the local frequency of the pulse-train varies in response to the audio input. Such self-oscillating designs pose a particular challenge for comprehensive mathematical modelling; we show that in order to properly account for the local frequency variations, a warped-time transformation is necessary. The systematic nature of our calculation means it can potentially be applied to a range of other self-oscillating topologies. Our results for a general input allow ready calculation of distortion diagnostics such as the intermodulation distortion (IMD), which prior analyses, based on sinusoidal input, cannot provide

    GaN vs. Si for Class D Audio Applications

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    The demands and applications of modern power electronics are quickly moving past the maximum performance capabilities of Silicon devices. As the processing of Wide Bandgap (WBG) materials matures and the commercial availability of WBG devices grows, circuit designers are exploring many applications to exploit the performance benefits over traditional Silicon devices. This work examines the under-explored application of GaN-based Class D audio by providing a side-by-side comparison of enhancement-mode GaN devices with currently available Silicon MOSFETs. It is suggested that GaN in Class D audio will allow for lower heat radiation, smaller circuit footprints, and longer battery life as compared to Si MOSFETs with a negligible trade-off for quality of sound

    Design of a Continuous-Time (CT) Sigma-Delta modulator for class D audio power amplifiers

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    Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadore

    Digital-Based Analog Processing in Nanoscale CMOS ICs for IoT Applications

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    L'abstract è presente nell'allegato / the abstract is in the attachmen

    Efficient Audio Systems

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    Digital-based analog processing in nanoscale CMOS ICs for IoT applications

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    The Internet-of-Things (IoT) concept has been opening up a variety of applications, such as urban and environmental monitoring, smart health, surveillance, and home automation. Most of these IoT applications require more and more power/area efficient Complemen tary Metal–Oxide–Semiconductor (CMOS) systems and faster prototypes (lower time-to market), demanding special modifications in the current IoT design system bottleneck: the analog/RF interfaces. Specially after the 2000s, it is evident that there have been significant improvements in CMOS digital circuits when compared to analog building blocks. Digital circuits have been taking advantage of CMOS technology scaling in terms of speed, power consump tion, and cost, while the techniques running behind the analog signal processing are still lagging. To decrease this historical gap, there has been an increasing trend in finding alternative IC design strategies to implement typical analog functions exploiting Digital in-Concept Design Methodologies (DCDM). This idea of re-thinking analog functions in digital terms has shown that Analog ICs blocks can also avail of the feature-size shrinking and energy efficiency of new technologies. This thesis deals with the development of DCDM, demonstrating its compatibility for Ultra-Low-Voltage (ULV) and Power (ULP) IoT applications. This work proves this state ment through the proposing of new digital-based analog blocks, such as an Operational Transconductance Amplifiers (OTAs) and an ac-coupled Bio-signal Amplifier (BioAmp). As an initial contribution, for the first time, a silicon demonstration of an embryonic Digital-Based OTA (DB-OTA) published in 2013 is exhibited. The fabricated DB-OTA test chip occupies a compact area of 1,426 µm2 , operating at supply voltages (VDD) down to 300 mV, consuming only 590 pW while driving a capacitive load of 80pF. With a Total Harmonic Distortion (THD) lower than 5% for a 100mV input signal swing, its measured small-signal figure of merit (FOMS) and large-signal figure of merit (FOML) are 2,101 V −1 and 1,070, respectively. To the best of this thesis author’s knowledge, this measured power is the lowest reported to date in OTA literature, and its figures of merit are the best in sub-500mV OTAs reported to date. As the second step, mainly due to the robustness limitation of previous DB-OTA, a novel calibration-free digital-based topology is proposed, named here as Digital OTA (DIG OTA). A 180-nm DIGOTA test chip is also developed exhibiting an area below the 1000 µm2 wall, 2.4nW power under 150pF load, and a minimum VDD of 0.25 V. The proposed DIGOTA is more digital-like compared with DB-OTA since no pseudo-resistor is needed. As the last contribution, the previously proposed DIGOTA is then used as a building block to demonstrate the operation principle of power-efficient ULV and ultra-low area (ULA) fully-differential, digital-based Operational Transconductance Amplifier (OTA), suitable for microscale biosensing applications (BioDIGOTA) such as extreme low area Body Dust. Measured results in 180nm CMOS confirm that the proposed BioDIGOTA can work with a supply voltage down to 400 mV, consuming only 95 nW. The BioDIGOTA layout occupies only 0.022 mm2 of total silicon area, lowering the area by 3.22X times compared to the current state of the art while keeping reasonable system performance, such as 7.6 Noise Efficiency Factor (NEF) with 1.25 µVRMS input-referred noise over a 10 Hz bandwidth, 1.8% of THD, 62 dB of the common-mode rejection ratio (CMRR) and 55 dB of power supply rejection ratio (PSRR). After reviewing the current DCDM trend and all proposed silicon demonstrations, the thesis concludes that, despite the current analog design strategies involved during the analog block development

    Class D audio amplifiers for high voltage capacitive transducers

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