2,126 research outputs found
Mapping DSP algorithms to a reconfigurable architecture Adaptive Wireless Networking (AWGN)
This report will discuss the Adaptive Wireless Networking project. The vision of the Adaptive Wireless Networking project will be given. The strategy of the project will be the implementation of multiple communication systems in dynamically reconfigurable heterogeneous hardware. An overview of a wireless LAN communication system, namely HiperLAN/2, and a Bluetooth communication system will be given. Possible implementations of these systems in a dynamically reconfigurable architecture are discussed. Suggestions for future activities in the Adaptive Wireless Networking project are also given
Digital implementation of the cellular sensor-computers
Two different kinds of cellular sensor-processor architectures are used nowadays in various
applications. The first is the traditional sensor-processor architecture, where the sensor and the
processor arrays are mapped into each other. The second is the foveal architecture, in which a
small active fovea is navigating in a large sensor array. This second architecture is introduced
and compared here. Both of these architectures can be implemented with analog and digital
processor arrays. The efficiency of the different implementation types, depending on the used
CMOS technology, is analyzed. It turned out, that the finer the technology is, the better to use
digital implementation rather than analog
Processing of FMCW 24/120GHz Radar Signals
Tato prĂĄce dokumentuje nĂĄvrh, realizaci a funkcionalitu zaĆĂzenĂ vzorkujĂcĂ zĂĄkladnĂ pĂĄsmo radaru, jeho firmware k akvizici dat a pĆenos pĆes USB a programovĂ© vybavenĂ pro osobnĂ poÄĂtaÄ. SystĂ©m byl navrĆŸeno pro testovacĂ sadu FMCW radaru Silicon Radar Easy. DĆŻleĆŸitĂĄ rozhodnutĂ provedenĂĄ v procesu nĂĄvrhu jsou poskytnuty se srovnĂĄnĂm s altenativami pro poskytnutĂ kontextu a usnadnÄnĂ vĂœvoje dalĆĄĂch zaĆĂzenĂ. Detekce vzdĂĄlenosti a rychlosti a ekvalizace I/Q vÄtvĂ jsou krĂĄtce probrĂĄny, spolu s minimĂĄlnĂmi systĂ©movĂœmi poĆŸadavky na zcela zabudovanĂ© zpracovĂĄnĂ radarovĂœch signĂĄlĆŻ.This thesis documents the design and performance of baseband sampling hardware, its data acquisition, and USB transmitting firmware, and PC-side reception software, designed for the Silicon Radar Easy FMCW radar module evaluation kit. Major design decision explanations are provided with comparisons to alternatives to provide context and ease further development. Range and velocity detection and I/Q imbalance equalization are briefly discussed, as well as the minimum system requirements for fully embedded signal processing
Project OASIS: The Design of a Signal Detector for the Search for Extraterrestrial Intelligence
An 8 million channel spectrum analyzer (MCSA) was designed the meet to meet the needs of a SETI program. The MCSA puts out a very large data base at very high rates. The development of a device which follows the MCSA, is presented
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