54 research outputs found
LIPIcs, Volume 251, ITCS 2023, Complete Volume
LIPIcs, Volume 251, ITCS 2023, Complete Volum
HAL-ASOS - Linux com aceleração em hardware para sistemas operativos dedicados à aplicação
Programa doutoral em Engenharia Eletrónica e de Computadores (PDEEC) (especialidade de Informática Industrial e Sistemas Embebidos)O ecossistema de sistemas embebidos de hoje tornou-se enorme, cobrindo vários e diferentes sistemas,
exigindo desempenho e mobilidade completa enquanto atingem autonomias de bateria cada vez maiores.
Mas a crescente frequência de relógio que resultou em dispositivos cada vez mais rápidos começou a
estagnar antes dos transÃstores pararem de encolher. Plataformas Field Programmable Gate Array (FPGA)
são uma solução alternativa para a implementação de sistemas completos e reconfiguráveis. Fornecem
desempenho e eficiência computacional para satisfazer requisitos da aplicação e do sistema embebido.
Vários Sistemas Operativos (SO) assistidos por FPGA foram propostos, mas ao estreitar seu foco na sÃntese
do datapath do acelerador de hardware, a grande maioria ignora a integração semântica destes no
SO. Ambientes de sÃntese de alto nÃvel (HLS) elevaram a abstração além da linguagem de transferência de
registo (RTL), seguindo uma abordagem especÃfica de domÃnio enquanto misturam software e abstrações
de hardware ad hoc, que dificultam as otimizações. Além disso, os modelos de programação para software
e hardware reconfigurável carecem de semelhanças, o que com o tempo dificultará a Exploração
do Ambiente de Design (DSE) e diminuirá o potencial de reutilização de código. Para responder a estas
necessidades, propomos HAL-ASOS, uma ferramenta para implementar sistemas embebidos baseados
em Linux que fornece (1) elasticidade no design em conformidade com a natureza evolutiva deste SO, (2)
integração semântica profunda de tarefas de hardware nos modelos de programação do Linux, (3) facilidade
na gestão de complexidade através de metodologia e ferramentas para apoiar o design, verificação
e implementação, (4) orientada por princÃpios de design hÃbridos e eficiência no sistema. Para avaliar as
funcionalidades da ferramenta, foi implementado um aplicativo criptográfico que demonstra alcance de
desempenho enquanto se emprega a metodologia de design. Novos nÃveis de desempenho são atingidos
numa aplicação de Visão por Computador que explora recursos de programação assÃncrona-sÃncrona. Os
resultados demonstram uma abordagem flexÃvel na reconfiguração entre hardware e software, e desempenho
que aumenta consistentemente com acréscimo de recursos ou frequência de relógio.Today’s embedded systems ecosystem became huge while covering several and different computer-based
systems, demanding for performance and complete mobility while experiencing longer battery lives. But
the rampant frequency that resulted in faster devices began hitting a wall even before transistors stopped
shrinking. Field Programmable Gate Array (FPGA) platforms are an alternative solution towards implementing
complete reconfigurable systems. They provide computational power, efficiency, in a lightweight
solution to serve the application requirements and increase performance in the overall system. Several
FPGA-assisted Operating Systems (OS) have been proposed, but by narrowing their focus on datapath
synthesis of the hardware accelerator, they completely ignore the deep semantic integration of these accelerators
into the OS. State-of-the-art High-Level Synthesis (HLS) environments have raised the level of
abstraction beyond Register Transfer Language (RTL) by following a domain-specific approach while mixing
ad hoc software and hardware abstractions, making harder for performance optimizations. Furthermore,
the programming models for software and reconfigurable hardware lack commonalities, which in time will
hinder the Design Space Exploration (DSE) and lower the potential for code reuse. To overcome these
issues, we propose HAL-ASOS, a framework to implement Linux-based Embedded systems which provides
(1) elasticity by design to comply with the evolutive nature of Linux, (2) deep semantic integration of the
hardware tasks in the Linux programming models, (3) easy complexity management using methodology
and tools to fully support design, verification and deployment, (4) hybrid and efficiency-oriented design
principles. To evaluate the framework functionalities, a cryptographic application was implemented and
demonstrates performance achievements while using the promoted application-driven design methodology.
To demonstrate new levels of performance that can be achieved, a Computer Vision application
explores several mixed asynchronous-synchronous programming features. Experiments demonstrate a
flexible design approach in terms of hardware and software reconfiguration, and significant performance
that increases consistently with the rising in processing resources or clock frequencies.Financial support received from Portuguese Foundation for Science and Technology (FCT) with the PhD grant SFRH/BD/82732/2011
Ubiquitous Computing
The aim of this book is to give a treatment of the actively developed domain of Ubiquitous computing. Originally proposed by Mark D. Weiser, the concept of Ubiquitous computing enables a real-time global sensing, context-aware informational retrieval, multi-modal interaction with the user and enhanced visualization capabilities. In effect, Ubiquitous computing environments give extremely new and futuristic abilities to look at and interact with our habitat at any time and from anywhere. In that domain, researchers are confronted with many foundational, technological and engineering issues which were not known before. Detailed cross-disciplinary coverage of these issues is really needed today for further progress and widening of application range. This book collects twelve original works of researchers from eleven countries, which are clustered into four sections: Foundations, Security and Privacy, Integration and Middleware, Practical Applications
High-Performance Modelling and Simulation for Big Data Applications
This open access book was prepared as a Final Publication of the COST Action IC1406 “High-Performance Modelling and Simulation for Big Data Applications (cHiPSet)“ project. Long considered important pillars of the scientific method, Modelling and Simulation have evolved from traditional discrete numerical methods to complex data-intensive continuous analytical optimisations. Resolution, scale, and accuracy have become essential to predict and analyse natural and complex systems in science and engineering. When their level of abstraction raises to have a better discernment of the domain at hand, their representation gets increasingly demanding for computational and data resources. On the other hand, High Performance Computing typically entails the effective use of parallel and distributed processing units coupled with efficient storage, communication and visualisation systems to underpin complex data-intensive applications in distinct scientific and technical domains. It is then arguably required to have a seamless interaction of High Performance Computing with Modelling and Simulation in order to store, compute, analyse, and visualise large data sets in science and engineering. Funded by the European Commission, cHiPSet has provided a dynamic trans-European forum for their members and distinguished guests to openly discuss novel perspectives and topics of interests for these two communities. This cHiPSet compendium presents a set of selected case studies related to healthcare, biological data, computational advertising, multimedia, finance, bioinformatics, and telecommunications
Embedded System Design
A unique feature of this open access textbook is to provide a comprehensive introduction to the fundamental knowledge in embedded systems, with applications in cyber-physical systems and the Internet of things. It starts with an introduction to the field and a survey of specification models and languages for embedded and cyber-physical systems. It provides a brief overview of hardware devices used for such systems and presents the essentials of system software for embedded systems, including real-time operating systems. The author also discusses evaluation and validation techniques for embedded systems and provides an overview of techniques for mapping applications to execution platforms, including multi-core platforms. Embedded systems have to operate under tight constraints and, hence, the book also contains a selected set of optimization techniques, including software optimization techniques. The book closes with a brief survey on testing. This fourth edition has been updated and revised to reflect new trends and technologies, such as the importance of cyber-physical systems (CPS) and the Internet of things (IoT), the evolution of single-core processors to multi-core processors, and the increased importance of energy efficiency and thermal issues
Internet of Things From Hype to Reality
The Internet of Things (IoT) has gained significant mindshare, let alone attention, in academia and the industry especially over the past few years. The reasons behind this interest are the potential capabilities that IoT promises to offer. On the personal level, it paints a picture of a future world where all the things in our ambient environment are connected to the Internet and seamlessly communicate with each other to operate intelligently. The ultimate goal is to enable objects around us to efficiently sense our surroundings, inexpensively communicate, and ultimately create a better environment for us: one where everyday objects act based on what we need and like without explicit instructions
A New System Architecture for Heterogeneous Compute Units
The ongoing trend to more heterogeneous systems forces us to rethink the design of systems. In this work, I study a new system design that considers heterogeneous compute units (general-purpose cores with different instruction sets, DSPs, FPGAs, fixed-function accelerators, etc.) from the beginning instead of as an afterthought. The goal is to treat all compute units (CUs) as first-class citizens, enabling (1) isolation and secure communication between all types of CUs, (2) a direct interaction of all CUs, removing the conventional CPU from the critical path, and (3) access to operating system (OS) services such as file systems and network stacks for all CUs.
To study this system design, I am using a hardware/software co-design based on two key ideas: 1) introduce a new hardware component next to each CU used by the OS as the CUs' common interface and 2) let the OS kernel control applications remotely from a different CU. The hardware component is called data transfer unit (DTU) and offers the minimal set of features to reach the stated goals: secure message passing and memory access. The OS is called M³ and runs its kernel on a dedicated CU and runs the OS services and applications on the remaining CUs. The kernel is responsible for establishing DTU-based communication channels between services and applications. After a channel has been set up, services and applications communicate directly without involving
the kernel. This approach allows to support arbitrary CUs as aforementioned first-class citizens, ranging from fixed-function accelerators to complex general-purpose cores
Highly reliable, low-latency communication in low-power wireless networks
Low-power wireless networks consist of spatially distributed, resource-constrained devices – also referred to as nodes – that are typically equipped with integrated or external sensors and actuators. Nodes communicate with each other using wireless transceivers, and thus, relay data – e. g., collected sensor values or commands for actuators – cooperatively through the network. This way, low-power wireless networks can support a plethora of different applications, including, e. g., monitoring the air quality in urban areas or controlling the heating, ventilation and cooling of large buildings. The use of wireless communication in such monitoring and actuating applications allows for a higher flexibility and ease of deployment – and thus, overall lower costs – compared to wired solutions. However, wireless communication is notoriously error-prone. Message losses happen often and unpredictably, making it challenging to support applications requiring both high reliability and low latency. Highly reliable, low-latency communication – along with high energy-efficiency – are, however, key requirements to support several important application scenarios and most notably the open-/closed-loop control functions found in e. g., industry and factory automation applications.
Communication protocols that rely on synchronous transmissions have been shown to be able to overcome this limitation. These protocols depart from traditional single-link transmissions and do not attempt to avoid concurrent transmissions from different nodes to prevent collisions. On the contrary, they make nodes send the same message at the same time over several paths. Phenomena like constructive interference and capture then ensure that messages are received correctly with high probability.
While many approaches relying on synchronous transmissions have been presented in the literature, two important aspects received only little consideration: (i) reliable operation in harsh environments and (ii) support for event-based data traffic. This thesis addresses these two open challenges and proposes novel communication protocols to overcome them
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