10,774 research outputs found
Optimizing the flash-RAM energy trade-off in deeply embedded systems
Deeply embedded systems often have the tightest constraints on energy
consumption, requiring that they consume tiny amounts of current and run on
batteries for years. However, they typically execute code directly from flash,
instead of the more energy efficient RAM. We implement a novel compiler
optimization that exploits the relative efficiency of RAM by statically moving
carefully selected basic blocks from flash to RAM. Our technique uses integer
linear programming, with an energy cost model to select a good set of basic
blocks to place into RAM, without impacting stack or data storage.
We evaluate our optimization on a common ARM microcontroller and succeed in
reducing the average power consumption by up to 41% and reducing energy
consumption by up to 22%, while increasing execution time. A case study is
presented, where an application executes code then sleeps for a period of time.
For this example we show that our optimization could allow the application to
run on battery for up to 32% longer. We also show that for this scenario the
total application energy can be reduced, even if the optimization increases the
execution time of the code
64-bit architechtures and compute clusters for high performance simulations
Simulation of large complex systems remains one of the most demanding
of high performance computer systems both in terms of raw compute performance
and efficient memory management. Recent availability of 64-bit
architectures has opened up the possibilities of commodity computers accessing
more than the 4 Gigabyte memory limit previously enforced by 32-bit
addressing. We report on some performance measurements we have made on
two 64-bit architectures and their consequences for some high performance
simulations. We discuss performance of our codes for simulations of artificial
life models; computational physics models of point particles on lattices; and
with interacting clusters of particles. We have summarised pertinent features
of these codes into benchmark kernels which we discuss in the context of wellknown
benchmark kernels of the 32-bit era. We report on how these these
findings were useful in the context of designing 64-bit compute clusters for
high-performance simulations
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