An Overview of Fully Integrated Switching Power Converters Based on Switched-Capacitor versus Inductive Approach and Their Advanced Control Aspects

This paper reviews and discusses the state of the art of integrated switched-capacitor and integrated inductive power converters and provides a perspective on progress towards the realization of efficient and fully integrated DC–DC power conversion. A comparative assessment has been presented to review the salient features in the utilization of transistor technology between the switched-capacitor and switched inductor converter-based approaches. First, applications that drive the need for integrated switching power converters are introduced, and further implementation issues to be addressed also are discussed. Second, different control and modulation strategies applied to integrated switched-capacitor (voltage conversion ratio control, duty cycle control, switching frequency modulation, Ron modulation, and series low drop out) and inductive converters (pulse width modulation and pulse frequency modulation) are then discussed. Finally, a complete set of integrated power converters are related in terms of their conditions and operation metrics, thereby allowing a categorization to provide the suitability of converter technologies

Class-E rectifiers and power converters: the operation of the class-E topology as a power amplifier and a rectifier with very high conversion efficiencies

In the late 70’s, the interest in reducing the value and size of reactive components moved power supply specialists to operate dc-to-dc converters at hundreds of kHz or even MHz frequencies. Passive energy storage (mainly magnetics) dominates the size of power electronics, limiting also its cost, reliability and dynamic response. Motivated by miniaturization and improved control bandwidth, they had to face the frequency-dependent turn-on and turn-off losses associated with the use of rectangular waveforms in the hard-switched topologies of that time. Similar to approaches for RF/microwave power amplifiers (PAs), the introduction of resonant circuits allowed shaping either a sinusoidal voltage or current, with parasitic reactive elements absorbed by the topology in the neighborhood of the switching frequency. The resulting resonant power converters, obtained by cascading a dc-to-ac resonant inverter with a high-frequency ac-to-dc rectifier, first transform the dc input power into controlled ac power, and then convert it back into the desired dc output [1]. This paper provides some historic notes on the operation of the class-E topology, introduced worldwide to the RF/microwave community by Nathan O. Sokal [2], as a power inverter and as a rectifier, with very high conversion efficiencies up to microwave frequencies. Recent research advances and implementations of class-E rectifiers and dc-to-dc converters at UHF and beyond are included. Offering competitive performance in terms of efficiency for RF power recovery, together with a wide bandwidth for low-loss power conversion, their potential for some modern applications is highlighted.The authors would like to acknowledge support in part by the Spanish Ministry of Economy, Industry and Competitiveness (MINECO) through TEC2014-58341-C4-1-R and TEC2017-83343-C4-1-R projects, co-funded with FEDER, and in part by Lockheed Martin Endowed Chair at the University of Colorado

Analysis of a new family of DC-DC converters with input-parallel output-series structure

There is an increasing trend of development and installation of switching power supplies due to their highly efficient power conversion, fast power control and high quality power conditioning for applications such as renewable energy integration and energy storage management systems. In most of these applications, high voltage conversion ratio is required. However, basic switching converters have limited voltage conversion ratio. There has been much research into development of high gain power converters. While most of the reported topologies focus on high gain and high efficiency, in this thesis, the input and output ripple currents and reliability are also considered to derive a new converter structure suitable for high step-up voltage conversion applications. High ripple currents and voltages at the input and output of dc-dc converters are not desirable because they may affect the operation of the dc source or the load. A number of converters operating in an interleaved manner can reduce these ripples. This thesis proposes a dc/dc switching converter structure which is capable of reducing the ripple problem through interleaved action, in addition to high gain and high efficiency voltage conversion. The thesis analyses the proposed converter structure through a dual buck-boost converter topology. The structure allows different converter topologies and combinations of them for different applications to be configured. The study begins with a motivation and a literature review of dc/dc converters. The new family of high step-up converters is introduced with an interleaved buck-boost as an example, followed by small-signal analysis. Experimental verifications, conclusions and future work are discussed

Analysis of a new family of DC-DC converters with input-parallel output-series structure

There is an increasing trend of development and installation of switching power supplies due to their highly efficient power conversion, fast power control and high quality power conditioning for applications such as renewable energy integration and energy storage management systems. In most of these applications, high voltage conversion ratio is required. However, basic switching converters have limited voltage conversion ratio. There has been much research into development of high gain power converters. While most of the reported topologies focus on high gain and high efficiency, in this thesis, the input and output ripple currents and reliability are also considered to derive a new converter structure suitable for high step-up voltage conversion applications. High ripple currents and voltages at the input and output of dc-dc converters are not desirable because they may affect the operation of the dc source or the load. A number of converters operating in an interleaved manner can reduce these ripples. This thesis proposes a dc/dc switching converter structure which is capable of reducing the ripple problem through interleaved action, in addition to high gain and high efficiency voltage conversion. The thesis analyses the proposed converter structure through a dual buck-boost converter topology. The structure allows different converter topologies and combinations of them for different applications to be configured. The study begins with a motivation and a literature review of dc/dc converters. The new family of high step-up converters is introduced with an interleaved buck-boost as an example, followed by small-signal analysis. Experimental verifications, conclusions and future work are discussed

Small Form Factor Hybrid CMOS/GaN Buck Converters for 10W Point of Load Applications

abstract: Point of Load (PoL) converters are important components to the power distribution system in computer power supplies as well as automotive, space, nuclear, and medical electronics. These converters often require high output current capability, low form factor, and high conversion ratios (step-down) without sacrificing converter efficiency. This work presents hybrid silicon/gallium nitride (CMOS/GaN) power converter architectures as a solution for high-current, small form-factor PoL converters. The presented topologies use discrete GaN power devices and CMOS integrated drivers and controller loop. The presented power converters operate in the tens of MHz range to reduce the form factor by reducing the size of the off-chip passive inductor and capacitor. Higher conversion ratio is achieved through a fast control loop and the use of GaN power devices that exhibit low parasitic gate capacitance and minimize pulse swallowing. This work compares three discrete buck power converter architectures: single-stage, multi-phase with 2 phases, and stacked-interleaved, using components-off-the-shelf (COTS). Each of the implemented power converters achieves over 80% peak efficiency with switching speeds up-to 10MHz for high conversion ratio from 24V input to 5V output and maximum load current of 10A. The performance of the three architectures is compared in open loop and closed loop configurations with respect to efficiency, output voltage ripple, and power stage form factor. Additionally, this work presents an integrated CMOS gate driver solution in CMOS 0.35um technology. The CMOS integrated circuit (IC) includes the gate driver and the closed loop controller for directly driving a single-stage GaN architecture. The designed IC efficiently drives the GaN devices up to 20MHz switching speeds. The presented controller technique uses voltage mode control with an innovative cascode driver architecture to allow a 3.3V CMOS devices to effectively drive GaN devices that require 5V gate signal swing. Furthermore, the designed power converter is expected to operate under 400MRad of total dose, thus enabling its use in high-radiation environments for the large hadron collider at CERN and nuclear facilities.Dissertation/ThesisMasters Thesis Electrical Engineering 201

Design of Power/Analog/Digital Systems Through Mixed-Level Simulations

In recent years the development of the applications in the field of telecommunications, data processing, control, renewable energy generation, consumer and automotive electronics determined the need for increasingly complex systems, also in shorter time to meet the growing market demand. The increasing complexity is mainly due to the mixed nature of these systems that must be developed to accommodate the new functionalities and to satisfy the more stringent performance requirements of the emerging applications. This means a more complex design and verification process. The key to managing the increased design complexity is a structured and integrated design methodology which allows the sharing of different circuit implementations that can be at transistor level and/or at a higher level (i.e.HDL languages).In order to expedite the mixed systems design process it is necessary to provide: an integrated design methodology; a suitable supporting tool able to manage the entire design process and design complexity and its successive verification.It is essential that the different system blocks (power, analog, digital), described at different level of abstraction, can be co-simulated in the same design context. This capability is referred to as mixed-level simulation.One of the objectives of this research is to design a mixed system application referred to the control of a coupled step-up dc-dc converter. This latter consists of a power stage designed at transistor-level, also including accurate power device models, and the analog controller implemented using VerilogA modules. Digital controllers are becoming very attractive in dc-dc converters for their programmability, ability to implement sophisticated control schemes, and ease of integration with other digital systems. Thus, in this dissertation it will be presented a detailed design of a Flash Analog-to-Digital Converter (ADC). The designed ADC provides medium-high resolution associated to high-speed performance. This makes it useful not only for the control application aforementioned but also for applications with huge requirements in terms of speed and signal bandwidth. The entire design flow of the overall system has been conducted in the Cadence Design Environment that also provides the ability to mixed-level simulations. Furthermore, the technology process used for the ADC design is the IHP BiCMOS 0.25 µm by using 50 GHz NPN HBT devices

Study and design of topologies and components for high power density DC-DC converters

Size reduction of low power electronic DC–DC converters is a topic of major interest for power electronics which requires the study and design of circuits and components working under redefined requirements. For this purpose, novel circuital topologies provide advantages in terms of power density increment, especially where a single chip design is feasible. These concepts have been applied to design and implement an integrated high step-down multiphase buck converter and to study the miniaturization of a stackable fiflyback architecture. Particular attention has been dedicated to power inductors, focusing on the modeling and measurement of magnetic materials’ hysteresis and core losses