732 research outputs found

    Design of a meta-assembler for microprogramming and a survey of microprogram optimization techniques

    Get PDF
    The purpose of this thesis is to develop and implement a meta-assembler for microprogramming. Different methods for optimizing microprogram execution and storage are also investigated. The meta-assembler is of an adaptive type. It allows complete flexibility in the definition of the target machine op-codes and microinstruction field formats. The assembly process consists of two main phases. In the first phase the assembler builds a description of the target machine in terms of its microinstruction field format definitions. In the second phase the source program is assembled into object microcode. The assembler is written in the language Pascal. The assembler is fast, efficient and the syntax allows easy development of source code. Different techniques for optimization of execution time and storage of microprograms are investigated, these include the description of the high level language SIMPL which allows high level microprogramming and generates optimized horizontal microcode --Abstract, page ii

    Graphical microcode simulator with a reconfigurable datapath

    Get PDF
    Microcode is a symbolic way to simplify control design that allows changing, testing and updating the control unit of processors. By changing the microcode, the same datapath can be used for an entirely different application, such as supporting a completely different instruction set. For these reasons, a majority of control units in modern day processors are microcoded. The object was to investigate and implement a graphical microcode simulator with a reconfigurable datapath and microcode format. By allowing a wide configuration of the datapath, many types of logical processors can be designed and simulated. The resulting implemented simulator is able to fill the void in microprogramming tools since there are no graphical microcode simulators that allow such customization of the datapath. The customization of the datapath goes beyond allowing different files specifying the datapath, it allows the datapath to be created and modified using the graphical interface.This tool is able to be used to design and simulate general-purpose processors and application specific processors through datapath and microcode configurations. In the academic setting, this tool provides easier microcode testing through verification on the instruction level for instructors and provide simulation debugging through code tracing and breakpoints for students

    Computer aided design of microprograms

    Get PDF

    Master of Science in Computer Science

    Get PDF

    Towards a design of HMO, an integrated hardware microcode optimizer

    Get PDF
    This paper discusses an algorithm for optimizing the density and parallelism of microcoded routines in micro-programmable machines. Besides presenting the algorithm itself, this research also analyzes the algorithm\u27s uses, design integration problems, architectural requirements, and adaptability to conventional machine characteristics. Even though the paper proposes a hardware implementation of the algorithm, the algorithm is viewed as an integral part of the entire microcode generation and usage process, from initial high-level input into a software microcode compiler down to machine-level execution of the resultant microcode on the host machine. It is believed that, by removing much of the traditionally time-consuming and machine-dependent microcode optimization from the software portion of this process, the algorithm can improve the overall process --Abstract, page ii

    Designing HMO, an Integrated Hardware Microcode Optimizer

    Get PDF
    This Paper Discusses an Algorithm for Optimizing the Density and Parallelism of Micro coded Routines in Micro programmable Machines. Besides the Algorithm itself, the Algorithm\u27s Uses, Design Integration Problems, Architectural Requirements, and Adaptability to Conventional Machine Characteristics Are Also Discussed and Analyzed. Even Though the Paper Proposes a Hardware Implementation of the Algorithm, the Algorithm is Viewed as an Integral Part of the Entire Microcode Generation and Usage Process, from Initial High-Level Input into a Software Microcode Compiler Down to Machine-Level Execution of the Resultant Microcode on the Host Machine. It is Believed that, by Removing Much of the Traditionally Time-Consuming and Machine-Dependent Microcode Optimization from the Software Portion of This Process, the Algorithm Can Improve the overall Process

    Master of Science in Computer Science Catalog

    Get PDF

    Master of Science Computer Science Courses Offered Winter Session 1982

    Get PDF
    • …
    corecore