Design And Implementation Of A Digital Controller With Dsp For Half-br

DC-DC power converters play an important role in powering telecom and computing systems. With the speed improvement and cost reduction of digital control, digital controller is becoming a trend for DC-DC converters in addition to existed digital monitoring and management technology. In this thesis, digital control is investigated for DC-DC converters applications. To deeply understand the whole control systems, DC-DC converter models are investigated based on averaged state-space modeling. Considering half-bridge isolated DC-DC converter with a current doublers rectifier has advantages over other topologies especially in the application of low-voltage and high-current DC-DC converters, the thesis take it as an example for digital control modeling and implementation. In Chapter 2, unified steady-state DC models and small-signal models are developed for both symmetric and asymmetric controlled half-bridge DC-DC converters. Based on the models, digital controller design is implemented. In Chapter 3, digital modeling platforms are established based on Matlab, Digital PID design and corresponding simulation results are provided. Also some critical issues and practical requirements are discussed. In Chapter 4, a DSP-based digital controller is implemented with the TI\u27s DSP chip TMS320F2812. Related implementation methods and technologies are discussed. Finally the experimental results of a DSP-based close-loop of HB converter are provided and analyzed in Chapter 5, and thesis conclusions are given in Chapter 6

Small Form Factor Hybrid CMOS/GaN Buck Converters for 10W Point of Load Applications

abstract: Point of Load (PoL) converters are important components to the power distribution system in computer power supplies as well as automotive, space, nuclear, and medical electronics. These converters often require high output current capability, low form factor, and high conversion ratios (step-down) without sacrificing converter efficiency. This work presents hybrid silicon/gallium nitride (CMOS/GaN) power converter architectures as a solution for high-current, small form-factor PoL converters. The presented topologies use discrete GaN power devices and CMOS integrated drivers and controller loop. The presented power converters operate in the tens of MHz range to reduce the form factor by reducing the size of the off-chip passive inductor and capacitor. Higher conversion ratio is achieved through a fast control loop and the use of GaN power devices that exhibit low parasitic gate capacitance and minimize pulse swallowing. This work compares three discrete buck power converter architectures: single-stage, multi-phase with 2 phases, and stacked-interleaved, using components-off-the-shelf (COTS). Each of the implemented power converters achieves over 80% peak efficiency with switching speeds up-to 10MHz for high conversion ratio from 24V input to 5V output and maximum load current of 10A. The performance of the three architectures is compared in open loop and closed loop configurations with respect to efficiency, output voltage ripple, and power stage form factor. Additionally, this work presents an integrated CMOS gate driver solution in CMOS 0.35um technology. The CMOS integrated circuit (IC) includes the gate driver and the closed loop controller for directly driving a single-stage GaN architecture. The designed IC efficiently drives the GaN devices up to 20MHz switching speeds. The presented controller technique uses voltage mode control with an innovative cascode driver architecture to allow a 3.3V CMOS devices to effectively drive GaN devices that require 5V gate signal swing. Furthermore, the designed power converter is expected to operate under 400MRad of total dose, thus enabling its use in high-radiation environments for the large hadron collider at CERN and nuclear facilities.Dissertation/ThesisMasters Thesis Electrical Engineering 201

A Novel Boost Converter Based LED Driver Chip Targeting Mobile Applications

abstract: A novel integrated constant current LED driver design on a single chip is developed in this dissertation. The entire design consists of two sections. The first section is a DC-DC switching regulator (boost regulator) as the frontend power supply; the second section is the constant current LED driver system. In the first section, a pulse width modulated (PWM) peak current mode boost regulator is utilized. The overall boost regulator system and its related sub-cells are explained. Among them, an original error amplifier design, a current sensing circuit and slope compensation circuit are presented. In the second section – the focus of this dissertation – a highly accurate constant current LED driver system design is unveiled. The detailed description of this highly accurate LED driver system and its related sub-cells are presented. A hybrid PWM and linear current modulation scheme to adjust the LED driver output currents is explained. The novel design ideas to improve the LED current accuracy and channel-to-channel output current mismatch are also explained in detail. These ideas include a novel LED driver system architecture utilizing 1) a dynamic current mirror structure and 2) a closed loop structure to keep the feedback loop of the LED driver active all the time during both PWM on-duty and PWM off-duty periods. Inside the LED driver structure, the driving amplifier with a novel slew rate enhancement circuit to dramatically accelerate its response time is also presented.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

Merged Two-Stage Power Converter With Soft Charging Switched-Capacitor Stage in 180 nm CMOS

In this paper, we introduce a merged two-stage dc-dc power converter for low-voltage power delivery. By separating the transformation and regulation function of a dc-dc power converter into two stages, both large voltage transformation and high switching frequency can be achieved. We show how the switched-capacitor stage can operate under soft charging conditions by suitable control and integration (merging) of the two stages. This mode of operation enables improved efficiency and/or power density in the switched-capacitor stage. A 5-to-1 V, 0.8 W integrated dc-dc converter has been developed in 180 nm CMOS. The converter achieves a peak efficiency of 81%, with a regulation stage switching frequency of 10 MHz.Interconnect Focus Center (United States. Defense Advanced Research Projects Agency and Semiconductor Research Corporation

Index to NASA Tech Briefs, 1975

This index contains abstracts and four indexes--subject, personal author, originating Center, and Tech Brief number--for 1975 Tech Briefs

Improved Accuracy Area Efficient Hybrid CMOS/GaN DC-DC Buck Converterfor High Step-Down Ratio Applications

abstract: Point of Load (POL) DC-DC converters are increasingly used in space applications, data centres, electric vehicles, portable computers and devices and medical electronics. Heavy computing and processing capabilities of the modern devices have ushered the use of higher battery supply voltage to increase power storage. The need to address this consumer experience driven requirement has propelled the evolution of the next generation of small form-factor power converters which can operate with higher step down ratios while supplying heavy continuous load currents without sacrificing efficiency. Constant On-Time (COT) converter topology is capable of achieving stable operation at high conversion ratio with minimum off-chip components and small silicon area. This work proposes a Constant On-Time buck dc-dc converter for a wide dynamic input range and load currents from 100mA to 10A. Accuracy of this ripple based converter is improved by a unique voltage positioning technique which modulates the reference voltage to lower the average ripple profile close to the nominal output. Adaptive On-time block features a transient enhancement scheme to assist in faster voltage droop recovery when the output voltage dips below a defined threshold. UtilizingGallium Nitride (GaN) power switches enable the proposed converter to achieve very high efficiency while using smaller size inductor-capacitor (LC) power-stage. Use of novel Superjunction devices with higher drain-source blocking voltage simplifies the complex driver design and enables faster frequency of operation. It allows 1.8VComplementary Metal-Oxide Semiconductor (CMOS) devices to effectively drive GaNpower FETs which require 5V gate signal swing. The presented controller circuit uses internal ripple generation which reduces reliance on output cap equivalent series resistance (ESR) for loop stability and facilitates ripples reduction at the output. The ripple generation network is designed to provide ai optimally stable performance while maintaining load regulation and line regulation accuracy withing specified margin. The chip with ts external Power FET package is proposed to be integrated on a printed circuit board for testing. The designed power converter is expected to operate under 200 MRad of a total ionising dose of radiation enabling it to function within large hadron collider at CERN and space satellite and probe missions.Dissertation/ThesisMasters Thesis Electrical Engineering 201

I MHz PWM Generation Using Intersective Method

This project serves as a basis to investigate the performance of a PWM generator circuit. This is due to available PWM generation method cannot cover a wide operation frequency and wide duty cycle range. PWM signal had been used in various application including power system, communication and control systems. Pulse-width modulation (PWM) is a very efficient way of providing intermediate amounts of electrical power between fully on and fully off

Discrete time control of a push-pull power converter

The objective is the design of a discrete time controller in a push-pull power converter. The work figures out the issues related to the migration of the analog control to the digital one in power converters and both simulation and experimental results are performed to obtain a comparative evaluation of both proposals.This work apply digital control techniques in a DC/DC push-pull power converter. Sections include converter modelization, control design, simulations, implementation and experimental results

The application of resonant-mode techniques to off-line converters for the commercial market

This thesis presents the work performed by the author on the application of resonantmode techniques to commercially-orientated off-line converters. An extensive review of resonant-mode topologies leads to the development of a method of categorisation of these topologies which allows a greater comprehension of their properties. The categories of converter thus obtained are the conventional resonant converter, the quasi-resonant converter, and the gap-resonant converter. The gap-resonant converter is selected for further investigation. An analysis reveals the limited load and input voltage capabilities of this converter, and hence leads to the introduction of a pre-regulating converter to improve reliability and commercial viability. High-frequency techniques are explored and reported, and new techniques are developed in several areas in order to extend the concept of the gap-resonant converter to a realworld practical design. Subjects explored include the high speed driving of power MOSFETs, MOSFET and diode switching losses, high frequency magnetic materials and core losses, and skin and proximity effects. The techniques developed are used in the design of a 30OW, off-line converter with an input voltage range of 165V to 380V after rectification, and a ten-to-one output load range