Ka-band 4 W GaN/Si MMIC power amplifier for CW radar applications

In this contribution it is reported the design, implementation and characterization of a 4-stage single-ended Ka-band power amplifier based on 100 nm GaN/Si commercial process. The amplifier, designed for CW radar applications, has been measured under small-signal and pulsed large-signal conditions. The amplifier exhibits an output power above 4W, together with power added efficiency in excess of 28 % and operative gain larger than 25dB over the 34GHz-38GHz frequency range

Watt-Level Ka-Band Integrated Doherty Power Amplifiers: Technologies and Power Combination Strategies Invited Paper

This paper discusses some of the design choices underlying the development of watt-level integrated Doherty power amplifiers in the K and Ka band, focusing on compound semiconductor technologies. The key aspect of on-chip power combination is discussed, presenting and comparing some of the possible alternatives. Then, the impact on the achievable bandwidth and performance of different parameters is quantified, adopting an approximate analysis, which focuses on the Doherty output combiner and allows estimating the non-linear performance of the amplifier thanks to some simplifying assumptions, without requiring a full, non-linear model of the active devices. Two sample GaAs and GaN technologies are compared first, considering parameters that are representative of the currently available commercial processes, and then several power combination strategies are analyzed, adopting the GaN technology, which is currently the only one that allows achieving the power levels required by the applications directly on chip. Finally, some hints as to the impact of the output parasitic effects of the transistors on the presented analysis are given

Advanced High Efficiency and Broadband Power Amplifiers Based on GaN HEMT for Wireless Applications

In advanced wireless communication systems, a rapid increase in the mobile data traffic and broad information bandwidth requirement can lead to the use of complex spectrally efficient modulation schemes such as orthogonal frequency-division multiplexing (OFDM). Generally, complex non-constant envelope modulated signals have very high peak-to-average ratios (PAPR). Doherty Power Amplifier (DPA) is the most commonly used power amplifier (PA) architecture for meeting high efficiency requirement in advanced communication systems, in the presence of high PAPR signals. However, limited bandwidth of the conventional DPA is often identified as a bottleneck for widespread deployment in base-station application for multi-standard communication signals. The research in this thesis focuses on the development of new designs to overcome the bandwidth limitations of a conventional PA. In particular, the bandwidth limitation factors of a conventional DPA architecture are studied. Moreover, a novel design technique is proposed for DPA’s bandwidth extension. In the first PA design, limited bandwidth and linearity problems are addressed simultaneously. For this purpose, a new Class-AB PA with extended bandwidth and improved linearity is presented for LTE 5 W pico-cell base-station over a frequency range of 1.9–2.5 GHz. A two-tone load/source-pull and bias point optimization techniques are used to extract the sweet spots for optimum efficiency and linearity from the 6 W Cree GaN HEMT device for the whole frequency band. The realized prototype presented saturated PAE higher than 60%, a power gain of 13 dB and an average output power of 36.5 dBm over the desired bandwidth. The proposed PA is also characterized by QAM-256 and LTE input communication signals for linearity characterization. Measured ACPRs are lower than -40 dBc for an input power of 17 dBm. The documented results indicate that the proposed Class-AB architecture is suitable for pico-cell base-station application. In the second PA design, an inherent bandwidth limitation of Class-F power amplifier forced by the improper load harmonics terminations at multiple harmonics is investigated and analyzed. It is demonstrated that the impedance tuning of the second and third harmonics at the drain terminal of a transistor is crucial to achieve a broadband performance. The effect of harmonics terminations on power amplifier’s bandwidth up to fourth harmonics is investigated. The implemented broadband Class-F PA achieved maximum saturated drain efficiency 60-77%, and 10 W output power throughout (1.1-2.1 GHz) band. The simulated and measured results verify that the presented Class-F PA is suitable for a high-efficiency system application in wireless communications over a wide range of frequencies. In the third PA design, a single- and dual-input DPA for LTE application in the 3.5 GHz frequency band are presented and compared. The main goal of this study is to improve the performance of gallium–nitride (GaN) Doherty transmitters over a wide bandwidth in the 3.5 GHz frequency band. For this purpose, the linearity-efficiency trade-off for the two proposed architectures is discussed in detail. Simulated results demonstrate that the single- and dual-input DPA exhibited a peak drain efficiency (DE) of 72.4% and 77%, respectively. Both the circuits showed saturated output power more than 42.9 dBm throughout the designed band. Saturated efficiency, gain and bandwidth of dual-input DPA are higher than that of the single-input DPA. On the other side, dual-input DPA linearity is worse as compared to the single-input DPA. In the last PA design, a novel design methodology for ultra-wide band DPA is presented. The bandwidth limitation factors of the conventional Doherty amplifier are discussed on the ground of broadband matching with impedance variation. To extend the DPA bandwidth, three different methods are used such as post-matching, low impedance transformation ratio and the optimization of offset line for wide bandwidth in the proposed design. The proposed Doherty power amplifier was designed and realized based on two 10 W GaN HEMT devices from Cree Inc. The measured results exhibited 42-57% of efficiency at the 6-dB back-off and saturated output power ranges from 41.5 to 43.1 dBm in the frequency range of 1.15 to 2.35 GHz (68.5% fractional bandwidth). Moreover, less than -25 dBc ACPRs are measured at 42 dBm peak output power throughout the designed band. In a nutshell, all power amplifiers presented in this thesis are suitable for wideband operation and their performances are satisfying the required operational standard. Therefore, this thesis has a significant contribution in the domain of high efficiency and broadband power amplifiers

Millimeter-Wave Gan Mmic Integration with Additive Manufacturing

This thesis addresses the analysis, design, integration and test of microwave and millimeter-wave monolithic microwave integrated circuits (MMIC or MMICs). Recent and ongoing progress in semiconductor device fabrication and MMIC processing technology has pushed the upper limit in MMIC frequencies from millimeter-wave (30 - 300 GHz) to terahertz (300 - 3000 GHz). MMIC components operating at these frequencies will be used to improve the sensitivity and performance of radiometers, receivers for communication systems, passive remote sensing systems, transceivers for radar instruments and radio astronomy systems. However, a serious hurdle in the utilization of these MMIC components, and a main topic presented in this thesis, is the development and reliable fabrication of practical packaging techniques. The focus of this thesis is the investigation of first, the design and analysis of microwave and millimeter-wave GaN MMICs and second, the integration of those MMICs into usable waveguide components. The analysis, design and testing of various X-band (8-12 GHz) thru H-band (170-260 GHz) GaN MMIC power amplifier (PA or PAs), including a V-band (40-75 GHz) voltage controlled oscillator, is the majority of this work. Several PA designs utilizing high-efficiency techniques are analyzed, designed and tested. These examples include a 2nd harmonic injection amplifier, a Class-E amplifier fabricated with a GaN-on-SiC 300 GHz fT process, and an example of the applicability of supply-modulation with a Doherty power amplifier, all operating at 10 GHz. Two H-band GaN MMIC PAs are designed, one with integrated CPW-to-waveguide transitions for integration. The analysis of PA stability is especially important for wideband, high-fT&nbsp;devices and a new way of analyzing stability is explored and experimentally validated. Last, the challenges of integrating MMICs operating at millimeter-wave frequencies are discussed and assemblies using additive and traditional manufacturing are demonstrated.</p

Advanced GaN HEMTs for high performance microwave power amplifiers

The ever increasing demand for high power levels at higher frequencies from the industry has stimulated extensive research in gallium nitride (GaN) transistor technology over the past two decades. This has led to significant advances of the technology, but the degradation in the device performance due to device self-heating and trap generation in the device epilayers during device operation is still a major challenge with the current GaN high electron mobility transistor (HEMT) technology. This thesis focuses on minimising device self-heating effects by means of efficient heat distribution within the device. Two approaches are analysed in this work. Firstly, the impact on the device DC performance of improved wafer growth conditions by using method called hot-wall MOCVD (metal organic chemical vapour deposition) are investigated. It was found that 2 µm × 100 µm devices on this wafer exhibit only 4% degradation in the saturated output current density at 20 V compared with 13% for devices fabricated on a wafer grown by standard MOCVD growth. This improved performance was attributed to lower thermal boundary resistance achieved by improved growth quality of the epitaxial material layers. In the second approach, the impact on self-heating was investigated through the use of a distributed device channel, i.e. introducing inactive regions along the device channel to distribute the hot spots in the device. Here a planar isolation method was used to achieve planar distributed gate devices that led to low leakage currents below 200 nA/mm at gate voltage of -20 V. A decrease in the peak channel temperature of 30°C was found through thermal simulations over a single 100 µm wide gate finger. Moreover, these distributed channel devices with gate periphery of 10 ×100 µm showed 13 % higher saturated current density than standard devices with the same active device area. The other major issue addressed in this thesis is the so-called current collapse which is a degradation in the output current caused by electron trapping in the device structure. An alternative solution to the conventionally used dielectric passivation is proposed and it entails the use of a thick undoped GaN cap layer to reduce the surface effects by moving the surface further away from the device channel. Drain lag measurements show 15% and 35% decrease in the current at quiescent bias decrease points of [-7 V; 10 V] and [-7 V; 20 V] respectively for the proposed structure compared with 80% decrease and complete current collapse at these quiescent bias points in the same geometry devices on a standard wafer with 2 nm GaN cap layer and a thin 10 nm thin SiNx passivation, respectively. The 10 nm thin passivation layer does not minimise the surface effects, but it protects the devices from oxidation. Finally, a single stage class A amplifier was demonstrated using the developed technology exhibiting peak output power of 30 dBm at 10 GHz and associated power added efficiency of 44% and gain of 10 dB. Also, gain of at least 9.4 dB was shown over 8-13 GHz bandwidth

Efficiency and Linearity Enhancement of Microwave GaN Power Amplifiers Using Harmonic Injection

This thesis addresses an architecture for enhancing efficiency and linearity of GaN power amplifiers using external second harmonic injection at the output. This transmitter architecture has potential uses in communication and radar systems which have stringent requirements of low DC power dissipation and minimum out of band interference. An idealized theoretical analysis based on expansions of the nonlinear transfer function of a PA predicts the measured improvements in linearity and efficiency. The experimental demostration is performed with both hybrid and integrated harmonically-injected PA using discrete GaN 6W transistors in class-AB mode with 55% PAE at a fundamental frequency of 2.45 GHz. Harmonic injection at the output is shown to enhance the efficiency of the PA to 89%. For a slightly reduced efficiency of 78%, the linearity can be improved and > 15 dB reduction of third and fifth order intermodulation distortion tones is measured in compression. Integration of a dynamic supply of the harmonically-injected PA is also investigated in order to achieve high efficiency and linearity for signals with Peak-to-Average ratios (PARs) of 6 dB and higher. Experimental results demonstrate a 70-80% efficient HI-PA for an output power variation of 6 dB. Reduction in third order nonlinear products and AM-PM distortion shows improved linearity of the PA over the entire range of power levels. Finally, the concept is extended to an X-band GaN MMIC to demonstrate integration and efficiency enhancement at 10 GHz with a 4 W, 47% efficient class-AB PA, with an expected final efficiency of over 60% with harmonic injection

Solid State Technology Branch of NASA Lewis Research Center Second Annual Digest, June 1989 - June 1990

A collection of papers and presentations authored by the branch between June 1989 and June 1990 is presented. The papers are organized into four sections. Section 1 deals with research in microwave circuits and includes full integrated circuits, the demonstration of optical/RF interfaces, and the evaluation of some hybrid circuitry. Section 2 indicates developments in coplanar waveguides and their use in breadboard circuits. Section 3 addresses high temperature superconductivity and includes: thin film deposition, transport measurement of film characteristics, RF surface resistant measurements, substrate permittivity measurements, measurements of microstrip line characteristics at cryogenic temperatures, patterning of superconducting films, and evaluation of simple passive microstrip circuitry based on YBaCuO films. Section 4 deals with carbon films, silicon carbide, GaAs/AlGaAs, HgCdTe, and other materials

Reconfigurable high efficiency class-F power amplifier using CMOS-MEMS technology

The increasing demand for wireless products to be part of our daily lives brings the need for longer battery lifetime, smaller size and lower cost. To increase battery lifetime, high efficiency power amplifiers (PAs) are needed; To make them smaller, integration or reconfiguration is aimed and to reach lower costs, technologies such as CMOS are final goals. However integration of high efficiency PA in CMOS is challenging due to the technology limitations which restricts the achievable output power and efficiency of the PA. In order to bring solutions for the above-mentioned requirements, in this thesis novel reconfigurable class-F PAs, frequency-reconfiguration, CMOS integration, impedance-reconfiguration and CMOS-MEMS implementation are addressed. Starting with a single frequency operation, a novel class-F PA for mobile applications is proposed in which with a proper harmonic tuning structure the need for extra filtering sections is eliminated, achieving an excellent harmonic-suppression level. This topology uses transmission lines and is developed to cover multiple frequency bands for purpose of global coverage with aim of size reduction. Three novel frequency reconfigurable PAs are proposed using MEMS and semiconductor switches to accomplish class-F operation at two frequencies. The main novelty of this structure is that the reconfiguration is done not only at fundamental frequency but also at harmonics with reduced number of tuning elements. Moreover, by proper placement of the switches in the stubs, the maximum voltages over the switches are minimized. The proposed structure overcomes the narrow band performance of class-F, giving an efficiency more than 60% over a 225 MHz and 175 MHz bandwidth at 900 MHz and 1800 MHz respectively. Measurement results showed high performance at both frequency bands giving 69.5% and 57.9% PAE at 900 MHz and 1800 MHz respectively. A novel CMOS class-F PA is proposed that controls up to the 3rd harmonic and can adapt to load variations due to the effect of the human body on mobile phones. It enables the integration of the PA with other devices in a single chip leading to better matching, higher performance, lower cost and smaller size. In addition, it achieves load impedance reconfigurability by using impedance tuner in its output network and by proper tuning of the network, effects of load variation on the performance are compensated. Two designs at 2.4 GHz have been done using either MOS varactors or MEMS variable capacitors as tuning devices. The design using MOS varactors show a maximum measured values of 26% PAE and 19.2 dBm output power for 50 load. For loads other than 50 ohm an improvement of 15% for PAE and 4.4 dB for output power is obtained in comparison to non-tuned one. The second design is done using MEMS variable capacitors integrated in CMOS technology through a mask-less post-processing technique. Simulations results for 50 ohm load show a peak PAE of 32.8% while delivering 18.2 dBm output power.La creixent demanda de productes sense fils en la nostra vida diària requereix dispositius de menor grandària, menor cost i amb una gran autonomia. Per reduir la mida i augmentar l'autonomia és necessari utilitzar sistemes integrats multiestàndard o reconfigurables, amb amplificadors de RF d'alta eficiència, mentre que per reduir el cost, és preferible utilitzar tecnologies econòmiques com CMOS. No obstant això, la integració en CMOS d'amplificadors de radiofreqüència, i en especial, d'alta eficiència, és un repte a causa de les limitacions de la tecnologia que restringeixen la potència de sortida realitzable i l'eficiència de l'amplificador. En aquesta tesi es tracten els diferents reptes anteriorment esmentats, proposant una nova topologia d'amplificador classe-F amb reconfiguració de freqüència, i proposant la integració d'un amplificador classe-F que s¿adapta a impedància de càrrega variable, implementat en CMOS i CMOS-MEMS. Inicialment en la tesi es proposa una topologia d'amplificador classe-F en què, gràcies a una estructura adequada a la xarxa d'adaptació, s¿elimina la necessitat de filtrat extra, aconseguint un nivell de rebuig d'harmònics excel·lent. La topologia proposada utilitza línies de transmissió i s'ha desenvolupat per dues bandes diferents, amb el disseny orientat a implementar un sistema reconfigurable. S'han aconseguit PAE de l'ordre del 80 % amb potències properes a 10 W. Un cop descrita i analitzada la topologia, s'han proposat tres amplificadors reconfigurables per doble banda freqüencial. Per a la reconfiguració s'han utilitzat MEMS i commutadors basats en semiconductors. L'estructura proposada permet la reconfiguració no només en la freqüència fonamental sinó també en els harmònics, però mantenint un nombre reduït d'elements d'ajust. A més, gràcies a l'adequada col·locació dels commutadors en les línies de transmissió, s'ha minimitzat la tensió màxima en els mateixos. Així mateix, l'estructura proposada evita la característica de banda estreta a classe-F, proporcionant una eficiència superior al 60% en unes amplades de banda de 225 MHz i de 175 MHz, per a les banda de 900 MHz i 1800 MHz respectivament. En aquestes bandes, la PAE màxima mesurada és del 69,5% i del 57,9% respectivament. Finalment, s'ha proposat un amplificador integrat en CMOS, classe-F amb control fins al tercer harmònic. L'amplificador proposat incorpora un sintonitzador a la sortida, podent així adaptar-se a variacions d'impedància de càrrega, típiques en dispositius sense fil (WLAN), degudes a l'efecte del cos humà sobre l'antena. La implementació en CMOS permet la integració de l'amplificador de potència amb altres dispositius en un únic xip, donant lloc a una millor adaptació, millor rendiment, menor cost i menor grandària del sistema. A més, gràcies a l'adaptació a les variacions de la impedància de càrrega, permet mantenir el rendiment en diferents rangs d'operació. S'han realitzat dos dissenys de l'amplificador a 2,4 GHz, un basat en varactors MOS i un altre en condensadors variables MEMS. El disseny que utilitza varactors MOS mostra una PAE màxima del 26% i una potència de 19,2 dBm per a càrrega adaptada 50 ohm. Per altres càrregues, gràcies a l'adaptació d'impedància, s'obté una millora de PAE del 15% i de 4,4 dB en potència de sortida. El disseny utilitzant condensadors MEMS s'integra en CMOS gràcies a post-processat sense màscares addicionals. Els resultats de simulació per a 50 ohm mostren una PAE del 32,8% per 18,2 dBm de potència de sortid

Investigation of Time Domain Modulation and Switching-Mode Power Amplifiers Suitable for Digitally-Assisted Transmitters

Innovation in wireless communication has resulted in accelerating demand for smartphones using multiple communications protocols such as WiFi, Bluetooth and the many cellular standards deployed around the world. The variety of frequency, bandwidth and power requirements associated with each standard typically calls for the implementation of separate radio frequency (RF) front end hardware for each standard. This is a less-than-ideal solution in terms of cost and device area. Software-defined radio (SDR) promises to solve this problem by allowing the RF hardware to be digitally reconfigurable to adapt to any wireless standard. The application of machine learning and cognition algorithms to SDR will enable cognitive radios and cognitive wireless networks, which will be able to intelligently adapt to user needs and surrounding radio spectrum conditions. The challenge of fully reconfigurable transceivers is in implementing digitally-controlled RF circuits which have comparable performance to their fixed-frequency counterparts. Switching-mode power amplifiers (SMPA) are likely to be an important part of fully reconfigurable transmitters since their switching operation provides inherent compatibility with digital circuits, with the added benefit of very high efficiency. As a step to understanding the RF requirements of high efficiency and switching PAs, an inverse class F PA in push-pull configuration is implemented. This configuration is chosen for its similarity to the current mode class D (CMCD) topology. The fabricated PA achieves a peak drain efficiency of over 75% with 42.7 dBm (18.6 W) output power at 2.46 GHz. Since SMPAs cannot directly provide the linearity required by current and future wireless communications standards, amplitude information must be encoded into the RF signal in a different way. Given the superior time resolution of digital integrated circuit (IC) technology, a logical solution is to encode this information into the timing of the signal. The two most common techniques for doing so are pulse width modulation and delta-sigma modulation. However, the design of delta-sigma modulators requires simulation as part of the design process due to the lack of closed-form relationships between modulator parameters (such as resolution and oversampling) and performance figures (such as coding efficiency and signal quality). In particular, the coding efficiency is often ignored although it is an important part of ensuring transmitter efficiency with respect to the desired signal. A study of these relationships is carried out to observe the tradeoffs between them. It is found that increasing the speed or complexity of a DS modulated system does not necessarily translate to performance benefits as one might expect. These observations can have a strong impact on design choices at the system level