Communication synthesis of networks-on-chip (NoC)

The emergence of networks-on-chip (NoC) as the communication infrastructure solution for complex multi-core SoCs presents communication synthesis challenges. This dissertation addresses the design and run-time management aspects of communication synthesis. Design reuse and the infeasibility of Intellectual Property (IP) core interface redesign, requires the development of a Core-Network Interface (CNI) which allows them to communicate over the on-chip network. The absence of intelligence amongst the NoC components, entails the introduction of a CNI capable of not only providing basic packetization and depacketization, but also other essential services such as reliability, power management, reconguration and test support. A generic CNI architecture providing these services for NoCs is proposed and evaluated in this dissertation. Rising on-chip communication power costs and reliability concerns due to these, motivate the development of a peak power management technique that is both scalable to dierent NoCs and adaptable to varying trac congurations. A scalable and adaptable peak power management technique - SAPP - is proposed and demonstrated. Latency and throughput improvements observed with SAPP demonstrate its superiority over existing techniques. Increasing design complexity make prediction of design lifetimes dicult. Post SoC deployment, an on-line health monitoring scheme, is essential to maintain con- dence in the correct operation of on-chip cores. The rising design complexity and IP core test costs makes non-concurrent testing of the IP cores infeasible. An on-line scheme capable of managing IP core test in the presence of executing applications is essential. Such a scheme ensures application performance and system power budgets are eciently managed. This dissertation proposes Concurrent On-Line Test (COLT) for NoC-based systems and demonstrates how a robust implementation of COLT using a Test Infrastructure-IP (TI-IP) can be used to maintain condence in the correct operation of the SoC

Dark signalling and code division multiple access in an optical fibre LAN with a bus topology

This thesis describes an optical fibre network that uses a bus topology and Code Division Multiple Access (CDMA). Various potential configurations are analysed and compared and it is shown that a serious limitation of optical CDMA schemes using incoherent correlators is the effect of optical beating due to the presence of multiple incoherent optical signals at the receiver photodiode. The network proposed and analysed in this thesis avoids beating between multiple optical fields because it only uses a single, shared, optical source. It does this through the SLIM (Single Light-source with In-line Modulation) configuration in which there is a continuously-operating light source at the head-end of a folded bus, and modulators at the nodes to impose signals on the optical field in the form of pulses of darkness which propagate along the otherwise continuously bright bus. Optical CDMA can use optical-fibre delay-line correlators as matched filters, and these may be operated either coherently or incoherently.Coherent operation is significantly more complex than incoherent operation, but incoherent correlators introduce further beating even in a SLIM network. A new design of optical delay-line correlator, the hybrid correlator, is therefore proposed, analysed and demonstrated. It is shown to eliminate beating. A model of a complete network predicts that a SLIMbus using optical CDMA with hybrid correlators can be operated at TeraBaud rates with the number of simultaneous users limited by multiple access interference (MAI), determined only by the combinatorics of the code set

Time-bin encoding for optical quantum computing

Scalability has been a longstanding issue in implementing large-scale photonic experiments for optical quantum computing. Traditional encodings based on the polarisation or spatial degrees of freedom become extremely resource-demanding when the number of modes becomes large, as the need for many nonclassical sources of light and the number of beam splitters required become unfeasible. Alternatively, time-bin encoding paves the way to overcome some of these limitations, as it only requires a single quantum light source and can be scaled to many temporal modes through judicious choice of pulse sequence and delays. Such an apparatus constitutes an important step toward large-scale experiments with low resource consumption. This work focuses on the time-bin encoding implementation. First, we assess its feasibility by thoroughly investigating its performance through numerical simulations under realistic conditions. We identify the critical components of the architecture and find that it can achieve performances comparable to state-of-the-art devices. Moreover, we consider two implementation approaches, in fibre and free space, and enumerate their strengths and weaknesses. Subsequently, we delve into the lab to explore these schemes and the key components involved therein. For the fibre case, we report the first implementation of time-bin encoded Gaussian boson sampling and use the samples obtained from the device to search for dense subgraphs of sizes three and four in a 10-node graph. Finally, we complement the study of the time-bin encoding with two side projects that contribute to the broad spectrum of enabling techniques for quantum information science. First, we demonstrate the ability to perform photon-number resolving measurements with a commercial superconducting nanowire single-photon detector system and apply it to improve the statistics of a heralded single-photon source. Second, we demonstrate that by employing a phase-tunable coherent state, we can fully characterise a multimode Gaussian state through solely the low-order photon statistics.Open Acces

High-Level Modelling of Optical Integrated Networks-Based Systems with the Provision of a Low Latency Controller

RÉSUMÉ La tendance du marché dans la conception des architectures multiprocesseurs de la prochaine génération consiste à intégrer de plus en plus de cœurs dans la même puce. Cette concentra-tion des cœurs dans la même puce exige l’amélioration des politiques d’intercommunication. L’une des solutions proposées dans ce contexte consiste à utiliser les réseaux sur puce vu qu’ils présentent une amélioration considérable en termes de la bande passante, l’évolutivité et de l’extensibilité. Néanmoins, vu la croissance exponentielle en nombres de cœurs sur puce, les interconnexions électriques dans les réseaux sur puce peuvent devenir un goulet d’étranglement dans la performance du système. Par conséquent, des nouvelles techniques et technologies doivent être adoptées pour remédier à ces problèmes. Les réseaux optiques intégrés (OIN venant de l’anglais Optical Integrated Networks) sont actuellement considérés comme l’un des paradigmes les plus prometteurs dans ce contexte. Les OINs o˙rent une plus grande bande passante, une plus faible consommation d’énergie et moins de latence lors de l’échange des données. Plusieurs travaux récents démontrent la faisabilité des OIN avec les technologies de fabrication disponibles et compatibles avec CMOS. Cependant, les concepteurs des OINs font face à plusieurs défis : Actuellement, les contrôleurs représentent le principal goulot d’étranglement de la com-munication et présentent l’un des facteurs minimisant l’eÿcacité des OINs. Alors, la proposition des nouvelles solutions de contrôle à faible latence est de plus en plus pri-mordiale pour en tirer profit. Le manque d’outils de modélisation et de validation des OINs. La plupart des travaux se concentrent sur la conception des dispositifs et l’amélioration des performances des composants de base, tout en laissant le système sans assistance. Dans ce contexte, afin de faciliter le déploiement de systèmes basés sur les OINs, cette thèse se focalise sur les trois contributions majeures suivantes: (1) le développement d’un ensemble de méthodes précises de modélisation qui va permettre par la suite de réaliser une plateforme de simulation au niveau du système ; (2) la définition et le développement d’une approche de contrôle eÿcace pour les systèmes basés sur les OINs; (3) l’évaluation de l’approche de contrôle proposée.----------ABSTRACT Design trends for next-generation Multi-Processor Systems point to the integration of a large number of processing cores, requiring high-performance interconnects. One solution being applied to improve the communication infrastructure in such systems is the usage of Networks-on-Chip as they present considerable improvement in the bandwidth and scaleabil-ity. Still as the number of integrated cores continues to increase and the system scales, the metallic interconnects in Networks-on-Chip can become a performance bottleneck. As a result, a new strategy must be adopted in order for those issues to be remedied. Optical Integrated Networks (OINs) are currently considered to be one of the most promising paradigm in this design context: they present higher bandwidth, lower power consumption and lower latency to broadcast information. Also, the latest work demonstrates the feasibility of OINs with their fabrication technologies being available and CMOS compatible. However, OINs’ designers face several challenges: Currently, controllers represent the main communication bottleneck and are one of the factors limiting the usage of OINs. Therefore, new controlling solutions with low latency are required. Designers lack tools to model and validate OINs. Most research nowadays is focused on designing devices and improving basic components performance, leaving system unattended. In this context, in order to ease the deployment of OIN-based systems, this PhD project focuses on three main contributions: (1) the development of accurate system-level modelling study to realize a system-level simulation platform; (2) the definition and development of an eÿcient control approach for OIN-based systems, and; (3) the system-level evaluation of the proposed control approach using the defined modelling

Future PON Data Centre Networks

Significant research efforts have been devoted over the last decade to design efficient data centre networks. However, major concerns are still raised about the power consumption of data centres and its impact on global warming in the first place and on the electricity bill of data centres in the second place. Passive Optical Network (PON) technology with its proven performance in residential access networks can provide energy efficient, high capacity, low cost, scalable, and highly elastic solutions to support connectivity inside modern data centres. Here, we focus on introducing PONs in the architecture of data centres to resolve many issues in current data centre designs such as high cost and high power consumption resulting from the large number of access and aggregation switches needed to interconnect hundreds of thousands of servers. PONs can also overcome the problems of switch oversubscription and unbalanced traffic in data centres where PON architectures and protocols have historically been optimised to deal with these problems and handle bursty traffic efficiently. In this thesis, five novel PON data centre designs are proposed and compared to facilitate intra and inter rack communications. In addition to maximising the use of only passive optical devices, other challenges have to be addressed by these designs including off-loading the inter-rack traffic from the Optical Line Terminal (OLT) switch to avoid undesired power consumption and delays, facilitating multi-path routing, and reducing or eliminating the need for expensive tuneable lasers. The Scalability of the proposed architectures in terms of efficiently accommodating hundreds of thousands of servers is discussed. CAPEX and energy consumption of the proposed architectures are also investigated and savings compared to conventional architectures, such as the Fat-Tree and BCube, are demonstrated. The Routing and Wavelength Assignment (RWA) in intra and inter rack communication and the resource provisioning needed to cater for different applications that can be hosted in data centre are optimised using Mixed Integer Linear Programming (MILP) models to minimise the PON designs power consumption. Furthermore, real-time energy-efficient routing and resource provisioning algorithms are developed. In addition to optimising the power consumption, delay is also considered for the delay sensitive applications that can be hosted in the proposed data centre architectures. To further reduce power consumption and overcome issues related to link oversubscription and multi-path routing, Software Defined Network (SDN) based design is proposed

Wavelengths switching and allocation algorithms in multicast technology using m-arity tree networks topology

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University London.In this thesis, the m-arity tree networks have been investigated to derive equations for their nodes, links and required wavelengths. The relationship among all parameters such as leaves nodes, destinations, paths and wavelengths has been found. Three situations have been explored, firstly when just one server and the leaves nodes are destinations, secondly when just one server and all other nodes are destinations, thirdly when all nodes are sources and destinations in the same time. The investigation has included binary, ternary, quaternary and finalized by general equations for all m-arity tree networks. Moreover, a multicast technology is analysed in this thesis to transmit data carried by specific wavelengths to several clients. Wavelengths multicast switching is well examined to propose split-convert-split-convert (S-C-S-C) multicast switch which consists of light splitters and wavelengths converters. It has reduced group delay by 13% and 29% compared with split-convert (S-C) and split-convert-split (S-C-S) multicast switches respectively. The proposed switch has also increased the received signal power by a significant value which reaches 28% and 26.92% compared with S-C-S and S-C respectively. In addition, wavelengths allocation algorithms in multicast technology are proposed in this thesis using tree networks topology. Distributed scheme is adopted by placing wavelength assignment controller in all parents’ nodes. Two distributed algorithms proposed shortest wavelength assignment (SWA) and highest number of destinations with shortest wavelength assignment (HND-SWA) algorithms to increase the received signal power, decrease group delay and reduce dispersion. The performance of the SWA algorithm was almost better or same as HND-SWA related to the power, dispersion and group delay but they are always better than other two algorithms. The required numbers of wavelengths and their utilised converters have been examined and calculated for the researched algorithms. The HND-SWA has recorded the superior performance compared with other algorithms. It has reduced number of utilised wavelengths up to about 19% and minimized number of the used wavelengths converters up to about 29%. Finally, the centralised scheme is discussed and researched and proposed a centralised highest number of destinations (CHND) algorithm with static and dynamic scenarios to reduce network capacity decreasing (Cd) after each wavelengths allocation. The CDHND has reduced (Cd) by about 16.7% compared with the other algorithms