21 research outputs found

    Analysis and design of wideband voltage controlled oscillators using self-oscillating active inductors.

    Get PDF
    Voltage controlled oscillators (VCOs) are essential components of RF circuits used in transmitters and receivers as sources of carrier waves with variable frequencies. This, together with a rapid development of microelectronic circuits, led to an extensive research on integrated implementations of the oscillator circuits. One of the known approaches to oscillator design employs resonators with active inductors electronic circuits simulating the behavior of passive inductors using only transistors and capacitors. Such resonators occupy only a fraction of the silicon area necessary for a passive inductor, and thus allow to use chip area more eectively. The downsides of the active inductor approach include: power consumption and noise introduced by transistors. This thesis presents a new approach to active inductor oscillator design using selfoscillating active inductor circuits. The instability necessary to start oscillations is provided by the use of a passive RC network rather than a power consuming external circuit employed in the standard oscillator approach. As a result, total power consumption of the oscillator is improved. Although, some of the active inductors with RC circuits has been reported in the literature, there has been no attempt to utilise this technique in wideband voltage controlled oscillator design. For this reason, the dissertation presents a thorough investigation of self-oscillating active inductor circuits, providing a new set of design rules and related trade-os. This includes: a complete small signal model of the oscillator, sensitivity analysis, large signal behavior of the circuit and phase noise model. The presented theory is conrmed by extensive simulations of wideband CMOS VCO circuit for various temperatures and process variations. The obtained results prove that active inductor oscillator performance is obtained without the use of standard active compensation circuits. Finally, the concept of self-oscillating active inductor has been employed to simple and fast OOK (On-Off Keying) transmitter showing energy eciency comparable to the state of the art implementations reported in the literature

    Disseny microelectrnic de circuits discriminadors de polsos pel detector LHCb

    Get PDF
    The aim of this thesis is to present a solution for implementing the front end system of the Scintillator Pad Detector (SPD) of the calorimeter system of the LHCb experiment that will start in 2008 at the Large Hadron Collider (LHC) at CERN. The requirements of this specific system are discussed and an integrated solution is presented, both at system and circuit level. We also report some methodological achievements. In first place, a method to study the PSRR (and any transfer function) in fully differential circuits taking into account the effect of parameter mismatch is proposed. Concerning noise analysis, a method to study time variant circuits in the frequency domain is presented and justified. This would open the possibility to study the effect of 1/f noise in time variants circuits. In addition, it will be shown that the architecture developed for this system is a general solution for front ends in high luminosity experiments that must be operated with no dead time and must be robust against ballistic deficit

    Electronics Emulation for Real-Time Fault Location in Power Systems

    Get PDF
    This research presents a high-speed hardware platform dedicated to emulate electrical power networks for the fault location. The solution implements an algorithm based on the Electromagnetic Time-Reversal (EMTR) principle, which allows locating faults in various network types and topologies. Although the technique is highly robust and accurate, its processing is complex and time consuming if solved with classical digital approaches. Therefore, a dedicated computation platform optimized on the processing speed was developed in order to allow its real-time implementation and make it compatible with smart-grids. Two different power network modelling approaches are presented. The first one is based on a finite element representation of the distributed parameters transmission line. The lossless line, initially characterized by a per-unit length inductance and capacitance, is replaced by a series of identical ladder connected inductor-capacitor (LC) elements. The second model is based on the general solution of the telegrapher's equations describing the signals propagated along the transmission line. In this method, the travelling waves' propagation taking place in the line is simulated with cascaded discrete-time delay elements. A possible implementation by means of analog circuits is then presented for each line model. The discretized parameters LC line is simulated by transconductance-capacitor, also called gyrator-C or gm-C topologies, more suitable for microelectronic implementation. On the other hand, the discrete-time delay element of the second method is implemented by switched-capacitor (SC) circuits. The processing time associated to each method can be scaled down according to the microelectronic parameters of the LC line, or by increasing the sampling frequency of the discrete-time model. Through this time scaling, the hardware emulation allows a fault location within duration of up to a hundred times shorter than with classical digital implementations of similar accuracy. The impact of non-ideal effects associated to the microelectronic implementation, such as the CMOS active elements finite gain, offset and dynamic range, or the switched-capacitor charge injection, etc., is evaluated for each model. Associated design constraints are then derived in order to ensure a given fault location accuracy, similarly to that of classical digital methods. Since the switched-capacitor model is characterized by higher robustness and accuracy than the LC line, it is therefore preferred for a silicon implementation. Results obtained after a CMOS AMS 0.35um process implementation have shown that the discrete-time model allows a fault location within 160ms, versus 6s in a classical digital method, with similar resolution (1%). The speed improvement obtained through the presented method is essential, potentially allowing real-time fault management in power grids. Finally, the impact of the magnitude quantization on the line model, offering perspectives of full digital implementations, is evaluated. A possible extension of the model for the simulation of interconnected or multi-conductor lines is also discussed

    An RF LC Q-enhanced CMOS iter using integrated inductors with layout optimization

    Get PDF
    Dissertação apresentada para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores, pela Universidade Nova de Lisboa, Faculdade de Ciências e TecnologiaThe advancement of CMOS technology led to the integration of more complex functions in a single chip. In the particular of wireless transceivers, integrated LC tanks are becoming popular both for VCOs and integrated lters. The design of a 2nd order CMOS 0.13 m Q-enhanced integrated LC lter for a frequency of 2.44 GHz is presented. The intent of this lter is to create a circuit for integrated wireless receiver and minimize the requirement for o -chip passive lter components, reducing the overall component count and size of wireless devices and systems. For RF applications the main challenge is still the design of integrated inductors with the maximum quality factor. For that purpose, tapered, i.e, variable width inductors have been introduced in the literature. In this work, a characterization of variable width integrated inductors is proposed. This inductor model is then integrated into an optimization procedure where inductors with a quality factor improvement are obtained

    Advanced Trends in Wireless Communications

    Get PDF
    Physical limitations on wireless communication channels impose huge challenges to reliable communication. Bandwidth limitations, propagation loss, noise and interference make the wireless channel a narrow pipe that does not readily accommodate rapid flow of data. Thus, researches aim to design systems that are suitable to operate in such channels, in order to have high performance quality of service. Also, the mobility of the communication systems requires further investigations to reduce the complexity and the power consumption of the receiver. This book aims to provide highlights of the current research in the field of wireless communications. The subjects discussed are very valuable to communication researchers rather than researchers in the wireless related areas. The book chapters cover a wide range of wireless communication topics
    corecore