Network-on-Chip

Limitations of bus-based interconnections related to scalability, latency, bandwidth, and power consumption for supporting the related huge number of on-chip resources result in a communication bottleneck. These challenges can be efficiently addressed with the implementation of a network-on-chip (NoC) system. This book gives a detailed analysis of various on-chip communication architectures and covers different areas of NoCs such as potentials, architecture, technical challenges, optimization, design explorations, and research directions. In addition, it discusses current and future trends that could make an impactful and meaningful contribution to the research and design of on-chip communications and NoC systems

Hierarchical Feature Learning

The success of many tasks depends on good feature representation which is often domain-specific and hand-crafted requiring substantial human effort. Such feature representation is not general, i.e. unsuitable for even the same task across multiple domains, let alone different tasks.To address these issues, a multilayered convergent neural architecture is presented for learning from repeating spatially and temporally coincident patterns in data at multiple levels of abstraction. The bottom-up weights in each layer are learned to encode a hierarchy of overcomplete and sparse feature dictionaries from space- and time-varying sensory data. Two algorithms are investigated: recursive layer-by-layer spherical clustering and sparse coding to learn feature hierarchies. The model scales to full-sized high-dimensional input data and to an arbitrary number of layers thereby having the capability to capture features at any level of abstraction. The model learns features that correspond to objects in higher layers and object-parts in lower layers.Learning features invariant to arbitrary transformations in the data is a requirement for any effective and efficient representation system, biological or artificial. Each layer in the proposed network is composed of simple and complex sublayers motivated by the layered organization of the primary visual cortex. When exposed to natural videos, the model develops simple and complex cell-like receptive field properties. The model can predict by learning lateral connections among the simple sublayer neurons. A topographic map to their spatial features emerges by minimizing the wiring length simultaneously with feature learning.The model is general-purpose, unsupervised and online. Operations in each layer of the model can be implemented in parallelized hardware, making it very efficient for real world applications

CAD-CAM workflow for the fabrication of bioscaffolds and porous auricular constructs with polycaprolactone using Ultimaker 2+

In recent years, the application of three-dimensional fabrication to fabricate customized porous scaffolds for cell culture has received much attention from the field of tissue engineering and plastic surgery. In this study, we applied a more publicly accessible 3D printer, Ultimaker 2+ with biodegradable polymer-polycaprolactone (PCL) to fabricate both three-dimensional bioscaffolds and auricular constructs (both solid and porous) prepared to fill the gap as potential solutions for both cartilage defects and microtia respectively by managing of the CAD-CAM workflow. As an overview, the modified CAD-CAM workflow was regarded as the uniform preparation fabricating types of scaffolds to identify the general printability of PCL with Ultimaker 2+. For bioscaffolds, limit test was performed on original scaffold, the resolution for printing scaffolds by PCL was identified as 600 microns by applying method of uniform scaling and limit approaching. For customized auricular constructs, we extract the model from MRI/CT scan and use its mirror image for the general shape of model building in a relatively customized way to fabricate solid auricular constructs. Boolean operation was then applied for fabricating the inner porous microstructure to fabricate porous auricular constructs. As there were no significant differences among three groups of filaments regarding the respective dimensions for both bioscaffolds (n=9 for each group: PCL, PLA and ABS) and customized auricular constructs(n=5 for both solid auricular constructs and porous auricular constructs) indicated by the P value(P>0.05) from ANOVA, The printing compatibility of PCL regarding each specific domain of scaffolds were identified. In Conclusion, our study had indicated a consistent CAD-CAM workflow for Ultimaker 2+ with PCL to fabricate three-dimensional bioscaffolds, solid auricular constructs and porous auricular constructs which could be potentially applied to fill the gap of cartilage engineering and microtia reconstruction through in-vitro cell culture, surgical simulation and in-situ cell culture respectively

Integrated Models and Tools for Design and Management of Global Supply Chain

In modern and global supply chain, the increasing trend toward product variety, level of service, short delivery delay and response time to consumers, highlight the importance to set and configure smooth and efficient logistic processes and operations. In order to comply such purposes the supply chain management (SCM) theory entails a wide set of models, algorithms, procedure, tools and best practices for the design, the management and control of articulated supply chain networks and logistics nodes. The purpose of this Ph.D. dissertation is going in detail on the principle aspects and concerns of supply chain network and warehousing systems, by proposing and illustrating useful methods, procedures and support-decision tools for the design and management of real instance applications, such those currently face by enterprises. In particular, after a comprehensive literature review of the principal warehousing issues and entities, the manuscript focuses on design top-down procedure for both less-than-unit-load OPS and unit-load storage systems. For both, decision-support software platforms are illustrated as useful tools to address the optimization of the warehousing performances and efficiency metrics. The development of such interfaces enables to test the effectiveness of the proposed hierarchical top-down procedure with huge real case studies, taken by industry applications. Whether the large part of the manuscript deals with micro concerns of warehousing nodes, also macro issues and aspects related to the planning, design, and management of the whole supply chain are enquired and discussed. The integration of macro criticalities, such as the design of the supply chain infrastructure and the placement of the logistic nodes, with micro concerns, such the design of warehousing nodes and the management of material handling, is addressed through the definition of integrated models and procedures, involving the overall supply chain and the whole product life cycle. A new integrated perspective should be applied in study and planning of global supply chains. Each aspect of the reality influences the others. Each product consumed by a customer tells a story, made by activities, transformations, handling, processes, traveling around the world. Each step of this story accounts costs, time, resources exploitation, labor, waste, pollution. The economical and environmental sustainability of the modern global supply chain is the challenge to face

Network-on-Chip Topologies: Potentials, Technical Challenges, Recent Advances and Research Direction

Integration technology advancement has impacted the System-on-Chip (SoC) in which heterogeneous cores are supported on a single chip. Based on the huge amount of supported heterogeneous cores, efficient communication between the associated processors has to be considered at all levels of the system design to ensure global interconnection. This can be achieved through a design-friendly, flexible, scalable, and high-performance interconnection architecture. It is noteworthy that the interconnections between multiple cores on a chip present a considerable influence on the performance and communication of the chip design regarding the throughput, end-to-end delay, and packets loss ratio. Although hierarchical architectures have addressed the majority of the associated challenges of the traditional interconnection techniques, the main limiting factor is scalability. Network-on-Chip (NoC) has been presented as a scalable and well-structured alternative solution that is capable of addressing communication issues in the on-chip systems. In this context, several NoC topologies have been presented to support various routing techniques and attend to different chip architectural requirements. This book chapter reviews some of the existing NoC topologies and their associated characteristics. Also, application mapping algorithms and some key challenges of NoC are considered

Parallel computing in information retrieval - An updated review

The progress of parallel computing in Information Retrieval (IR) is reviewed. In particular we stress the importance of the motivation in using parallel computing for Text Retrieval. We analyse parallel IR systems using a classification due to Rasmussen [1] and describe some parallel IR systems. We give a description of the retrieval models used in parallel Information Processing.. We describe areas of research which we believe are needed