Subsampling receivers with applications to software defined radio systems

Este trabajo de tesis propone la utilización sistemas basados en submuestreo como una alternativa para la implementación de la etapa de down-conversion de los receptores de radio frecuencia (RF) empleados para aplicaciones multi-estándar y SDR (Software Defined Radio). El objetivo principal será el de optimizar el diseño en cuanto a flexibilidad y simplicidad, las cuales son propiedades inherentes en los sistemas basados en submuestreo. Por tanto, como reducir el número de componentes al mínimo es clave cuando un mismo receptor procesa diferentes estándares de comunicación, las arquitecturas basadas en submuestreo han sido seleccionadas, donde la reusabilidad de los componentes empleados es posible, así como la reducción de los costes totales de los receptores de comunicación y de los equipos de certificación que emplean estas arquitecturas. Un motivo adicional por el que los sistemas basados en submuestreo han sido seleccionados es el concerniente a la topología del receptor. Como la idea de la tecnología SDR es implementar todas las funcionalidades del receptor (filtrado, amplificación) en el dominio digital, el convertidores analógico-digital (ADC) deberá estar localizado en la cadena de recepción lo más cerca posible a la antena, siendo el objetivo final el convertir la señal directamente de RF a digital. Sin embargo, con los actuales ADC no es posible implementar esta idea debido al alto ancho de banda que necesitarían sin perder resolución para cubrir las especificaciones de los estándares de comunicaciones inalámbricas. Por tanto, los sistemas basados en submuestreo se presentan como la opción más adecuada para implementar este tipo de sistemas debido a que pueden muestrear la señal de entrada por debajo de la tasa de Nyquist, si se cumplen ciertas restricciones en cuanto a la elección de la frecuencia de muestreo. De este modo, los requerimientos del ADC serán relajados ya que, usando estas arquitecturas, este componente procesará la señal a frecuencias intermedias. Una vez se han introducido los conceptos principales de las técnicas de submuestreo, esta tesis doctoral presenta el diseño de una tarjeta de adquisición de datos basada en submuestreo con la finalidad de ser implementada como un receptor de test y certificación de banda ancha. El sistema propuesto proporciona una alta resolución para un elevado ancho de banda, a partir del uso de un S&H de bajo jitter y de un convertidor analógico digital ADC que trabaja a frecuencias intermedias. El sistema es implementado usando dispositivos comerciales en una placa de circuito impreso diseñada y fabricada, y cuya caracterización experimental muestra una resolución de más 8 bits para un ancho de banda analógico de 20 MHz. Concretamente, la resolución medida será mayor de 9 bits hasta una frecuencia de entrada de 2.9 GHz y mayor de 8 bits para una frecuencia de entrada de hasta 6.5 GHz, lo cual resulta suficiente para cubrir los requerimientos de la mayor parte de los actuales estándares de comunicaciones inalámbricas (GPS, GSM, GPRS, UMTS, Bluetooth, Wi-Fi, WiMAX). Sin embargo, los receptores basados en submuestreo presentan algunos importantes inconvenientes, como son adicionales fuentes de ruido (jitter y plegado de ruido térmico) y una dificultad añadida para implementarlo en escenarios multi-banda y no lineales. Acerca del plegado de ruido en la banda de interés, esta tesis propone el uso de una técnica basada en una arquitectura de reloj múltiple con el objetivo de aumentar la resolución y cubrir un número mayor de estándares para su test y certificación. Empleando una frecuencia de muestreo mayor para el caso del S&H, se conseguirá reducir este efecto, aumentando la resolución en aproximadamente 0.5-1 bit respecto al caso de sólo usar una fuente de reloj. Las expresiones teóricas de esta mejora son desarrolladas y presentadas en esta tesis, siendo posteriormente corroboradas de modo experimental. Por otra parte, esta tesis también propone novedosas técnicas para la aplicación de estos sistemas de submuestreo en entornos multi-banda y no lineales, los cuales presentan desafíos adicionales por el hecho de existir la posibilidad de solapamiento entre la señal de interés y los otros canales de comunicación, así como de solapamiento con sus armónicos. De este modo, esta tesis extiende el uso de los sistemas basados en submuestreo para este tipo de entornos, proponiendo técnicas para la elección de la frecuencia óptima de muestreo que evitan el solapamiento entre señales, a la vez que consiguen incrementar la resolución del receptor. Finalmente, se presentará la optimización en cuanto a características de ruido de un receptor concreto para aplicaciones de banda dual en entornos no lineales. Dicho receptor estará basado en las técnicas de reloj múltiple presentadas anteriormente y en una estructura de multi-filtro entre el S&H y el ADC. El sistema diseñado podrá emplearse para diversas aplicaciones a ambos lados de la cadena de comunicación, tal como en receptores de detección de espectro para radio cognitiva, o implementando el bucle de realimentación de un transmisor para la linealización de amplificadores de potencia. Por tanto, la presente tesis doctoral cuenta con tres contribuciones diferenciadas. La primera de ellas es la dedicada al diseño de un prototipo de recepción multi-estándar basado en submuestreo para aplicaciones de test y certificación. La segunda aportación es la dedicada a la optimización de las especificaciones de ruido a partir de las técnicas presentadas basadas en reloj múltiple. Por último, la tercera contribución principal es la relacionada con la extensión de este tipo de técnicas a sistemas multi-banda en entornos no lineales. Todas estas contribuciones han sido estudiadas teóricamente y experimentalmente validadas

Photonic Technologies for Radar and Telecomunications Systems

The growing interest in flexible architectures radio and the recent progress in the high speed digital signal processor make a software defined radio system an enabling technology for several digital signals processing architecture and for the flexible signal generation. In this direction wireless radar\telecommunications receiver with digital backend as close as possible to the antenna, as well as the software defined signal generation, reaches several benefits in term of reconfigurabilty, reliability and cost with respect to the analogical front-ends. Unfortunately the present scenario ensures direct sampling and digital downconversion only at the intermediate frequency. Therefore these kinds of systems are quite vulnerable to mismatches and hardware non-idealities in particular due to the mixers stages and filtering process. Furthermore, since the limited input bandwidth, speed and precision of the analog to digital converters represent the main digital system‘s bottleneck, today‘s direct radio frequency sampling is only possible at low frequency. On the other hand software defined signals can be generated exploiting direct digital synthesizers followed by an up-conversion to the desired carrier frequency. State-of-the-art synthesizers (limited to few GHz) introduce quantization errors due to digital-to-analog conversion, and phase errors depending on the phase stability of their internal clock. In addition the high phase stability required in modern wireless systems (such as radar systems) is becoming challenging for the electronic RF signal generation, since at high carrier frequency the frequency multiplication processes that are usually exploited reduce the phase stability of the original RF oscillators. Over the past 30 years microwave photonics (MWP) has been defined as the field that study the interactions between microwave and optical waves and their applications in radar and communications system as well as in hybrid sensor‘s instrumentation. As said before software defined radio applications drive the technological development trough high speed\bandwidth and high dynamic range systems operating directly in the radio frequency domain. Nowadays, while digital electronics represent a limit on system performances, photonic technologies perfectly engages the today‘s system needs and offers promising solution thanks to its inherent high frequency and ultrawide bandwidth. Moreover photonic components with very high phase coherence guarantees highly stable microwave carriers; while strong immunity to the electromagnetic interference, low loss and high tunability make a MWP system robust, flexible and reliable. Historical research and development of MWP finds space in a wide range of applications including the generation, distribution and processing of radio frequency signals such as, for example, analog microwave photonic link, antenna remoting, high frequency and low noise photonic microwave signal generation, photonic microwave signal processing (true time delay for phased array systems, tunable high Q microwave photonic filter and high speed analog to digital converters) and broadband wireless access networks. Performances improvement of photonic and hybrid devices represents a key factor to improve the development of microwave photonic systems in many other applications such as Terahertz generation, optical packet switching and so on. Furthermore, advanced in silicon photonics and integration, makes the low cost complete microwave photonic system on chip just around the corner. In the last years the use of photonics has been suggested as an effective way for generating low phase-noise radio frequency carriers even at high frequency. However while a lot of efforts have been spent in the photonic generation of RF carriers, only few works have been presented on reconfigurable phase coding in the photonics-based signal generators. In this direction two innovative schemes for optically generate multifrequency direct RF phase modulated signals have been presented. Then we propose a wideband ADC with high precision and a photonic wireless receiver for sparse sensing. This dissertation focuses on microwave photonics for radar and telecommunications systems. In particular applications in the field of photonic RF signal generation, photonic analog to digital converters and photonic ultrawideband radio will be presented with the main objective to overcome the limitations of pure electrical systems. Schemes and results will be further detailed and discussed. The dissertation is organized as follows. In the first chapter an overview of the MWP technologies is presented, focusing the attention of the limits overcame by using hybrid optoelectronic systems in particular field of applications. Then optoelectronic devices are introduced in the second chapter to better understand their role in a MWP system. Chapters 3,4, and 5 present results on photonic microwave signal generation, photonic wideband analog to digital converters and photonic ultrawideband up\down converter for both radar and telecommunications applications. Finally in the chapter 6 an overview of the photonic radar prototype is given

A survey on hybrid beamforming techniques in 5G : architecture and system model perspectives

The increasing wireless data traffic demands have driven the need to explore suitable spectrum regions for meeting the projected requirements. In the light of this, millimeter wave (mmWave) communication has received considerable attention from the research community. Typically, in fifth generation (5G) wireless networks, mmWave massive multiple-input multiple-output (MIMO) communications is realized by the hybrid transceivers which combine high dimensional analog phase shifters and power amplifiers with lower-dimensional digital signal processing units. This hybrid beamforming design reduces the cost and power consumption which is aligned with an energy-efficient design vision of 5G. In this paper, we track the progress in hybrid beamforming for massive MIMO communications in the context of system models of the hybrid transceivers' structures, the digital and analog beamforming matrices with the possible antenna configuration scenarios and the hybrid beamforming in heterogeneous wireless networks. We extend the scope of the discussion by including resource management issues in hybrid beamforming. We explore the suitability of hybrid beamforming methods, both, existing and proposed till first quarter of 2017, and identify the exciting future challenges in this domain

Ultra-Wideband Secure Communications and Direct RF Sampling Transceivers

Larger wireless device bandwidth results in new capabilities in terms of higher data rates and security. The 5G evolution is focus on exploiting larger bandwidths for higher though-puts. Interference and co-existence issues can also be addressed by the larger bandwidth in the 5G and 6G evolution. This dissertation introduces of a novel Ultra-wideband (UWB) Code Division Multiple Access (CDMA) technique to exploit the largest bandwidth available in the upcoming wireless connectivity scenarios. The dissertation addresses interference immunity, secure communication at the physical layer and longer distance communication due to increased receiver sensitivity. The dissertation presents the design, workflow, simulations, hardware prototypes and experimental measurements to demonstrate the benefits of wideband Code-Division-Multiple-Access. Specifically, a description of each of the hardware and software stages is presented along with simulations of different scenarios using a test-bench and open-field measurements. The measurements provided experimental validation carried out to demonstrate the interference mitigation capabilities. In addition, Direct RF sampling techniques are employed to handle the larger bandwidth and avoid analog components. Additionally, a transmit and receive chain is designed and implemented at 28 GHz to provide a proof-of-concept for future 5G applications. The proposed wideband transceiver is also used to demonstrate higher accuracy direction finding, as much as 10 times improvement

Fully-photonic digital radio over fibre for future super-broadband access network applications

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel UniversityIn this thesis a Fully-Photonic DRoF (FP-DRoF) system is proposed for deploying of future super-broadband access networks. Digital Radio over Fibre (DRoF) is more independent of the fibre network impairments and the length of fibre than the ARoF link. In order for fully optical deployment of the signal conversion techniques in the FP-DRoF architecture, two key components an Analogue-to-Digital Converter (ADC) and a Digital-to-Analogue Converter (DAC)) for data conversion are designed and their performance are investigated whereas the physical functionality is evaluated. The system simulation results of the proposed pipelined Photonic ADC (PADC) show that the PADC has 10 GHz bandwidth around 60 GHz of sampling rate. Furthermore, by changing the bandwidth of the optical bandpass filter, switching to another band of sampling frequency provides optimised performance condition of the PADC. The PADC has low changes on the Effective Number of Bit (ENOB) response versus analogue RF input from 1 GHz up to 22 GHz for 60 GHz sampling frequency. The proposed 8-Bit pipelined PADC performance in terms of ENOB is evaluated at 60 Gigasample/s which is about 4.1. Recently, different methods have been reported by researchers to implement Photonic DACs (PDACs), but their aim was to convert digital electrical signals to the corresponding analogue signal by assisting the optical techniques. In this thesis, a Binary Weighted PDAC (BW-PDAC) is proposed. In this BW-PDAC, optical digital signals are fully optically converted to an analogue signal. The spurious free dynamic range at the output of the PDAC in a back-to-back deployment of the PADC and the PDAC was 26.6 dBc. For further improvement in the system performance, a 3R (Retiming, Reshaping and Reamplifying) regeneration system is proposed in this thesis. Simulation results show that for an ultrashort RZ pulse with a 5% duty cycle at 65 Gbit/s using the proposed 3R regeneration system on a link reduces rms timing jitter by 90% while the regenerated pulse eye opening height is improved by 65%. Finally, in this thesis the proposed FP-DRoF functionality is evaluated whereas its performance is investigated through a dedicated and shared fibre links. The simulation results show (in the case of low level signal to noise ratio, in comparison with ARoF through a dedicated fibre link) that the FP-DRoF has better BER performance than the ARoF in the order of 10-20. Furthermore, in order to realize a BER about 10-25 for the ARoF, the power penalty is about 4 dBm higher than the FP-DRoF link. The simulation results demonstrate that by considering 0.2 dB/km attenuation of a standard single mode fibre, the dedicated fibre length for the FP-DRoF link can be increased to about 20 km more than the ARoF link. Moreover, for performance assessment of the proposed FP-DRoF in a shared fibre link, the BER of the FP-DRoF link is about 10-10 magnitude less than the ARoF link for -19 dBm launched power into the fibre and the power penalty of the ARoF system is 10 dBm more than the FP-DRoF link. It is significant to increase the fibre link’s length of the FP-DRoF access network using common infrastructure. In addition, the simulation results are demonstrated that the FP-DRoF with non-uniform Wavelength Division Multiplexing (WDM) is more robust against four wave mixing impairment than the conventional WDM technique with uniform wavelength allocation and has better performance in terms of BER. It is clearly verified that the lunched power penalty at CS for DRoF link with uniform WDM techniques is about 2 dB higher than non-uniform WDM technique. Furthermore, uniform WDM method requires more bandwidth than non-uniform scheme which depends on the total number of channels and channels spacing

Parametric analog signal amplification applied to nanoscale cmos wireless digital transceivers

Thesis presented in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the subject of Electrical and Computer Engineering by the Universidade Nova de Lisboa,Faculdade de Ciências e TecnologiaSignal amplification is required in almost every analog electronic system. However noise is also present, thus imposing limits to the overall circuit performance, e.g., on the sensitivity of the radio transceiver. This drawback has triggered a major research on the field, which has been producing several solutions to achieve amplification with minimum added noise. During the Fifties, an interesting out of mainstream path was followed which was based on variable reactance instead of resistance based amplifiers. The principle of these parametric circuits permits to achieve low noise amplifiers since the controlled variations of pure reactance elements is intrinsically noiseless. The amplification is based on a mixing effect which enables energy transfer from an AC pump source to other related signal frequencies. While the first implementations of these type of amplifiers were already available at that time, the discrete-time version only became visible more recently. This discrete-time version is a promising technique since it is well adapted to the mainstream nanoscale CMOS technology. The technique itself is based on the principle of changing the surface potential of the MOS device while maintaining the transistor gate in a floating state. In order words, the voltage amplification is achieved by changing the capacitance value while maintaining the total charge unchanged during an amplification phase. Since a parametric amplifier is not intrinsically dependent on the transconductance of the MOS transistor, it does not directly suffer from the intrinsic transconductance MOS gain issues verified in nanoscale MOS technologies. As a consequence, open-loop and opamp free structures can further emerge with this additional contribution. This thesis is dedicated to the analysis of parametric amplification with special emphasis on the MOS discrete-time implementation. The use of the latter is supported on the presentation of several circuits where the MOS Parametric Amplifier cell is well suited: small gain amplifier, comparator, discrete-time mixer and filter, and ADC. Relatively to the latter, a high speed time-interleaved pipeline ADC prototype is implemented in a,standard 130 nm CMOS digital technology from United Microelectronics Corporation (UMC). The ADC is fully based on parametric MOS amplification which means that one could achieve a compact and MOS-only implementation. Furthermore, any high speed opamp has not been used in the signal path, being all the amplification steps implemented with open-loop parametric MOS amplifiers. To the author’s knowledge, this is first reported pipeline ADC that extensively used the parametric amplification concept.Fundação para a Ciência e Tecnologia through the projects SPEED, LEADER and IMPAC