Architecture of a network-in-the-Loop environment for characterizing AC power system behavior

This paper describes the method by which a large hardware-in-the-loop environment has been realized for three-phase ac power systems. The environment allows an entire laboratory power-network topology (generators, loads, controls, protection devices, and switches) to be placed in the loop of a large power-network simulation. The system is realized by using a realtime power-network simulator, which interacts with the hardware via the indirect control of a large synchronous generator and by measuring currents flowing from its terminals. These measured currents are injected into the simulation via current sources to close the loop. This paper describes the system architecture and, most importantly, the calibration methodologies which have been developed to overcome measurement and loop latencies. In particular, a new "phase advance" calibration removes the requirement to add unwanted components into the simulated network to compensate for loop delay. The results of early commissioning experiments are demonstrated. The present system performance limits under transient conditions (approximately 0.25 Hz/s and 30 V/s to contain peak phase-and voltage-tracking errors within 5. and 1%) are defined mainly by the controllability of the synchronous generator

Performance evaluation of an open distributed platform for realistic traffic generation

Network researchers have dedicated a notable part of their efforts to the area of modeling traffic and to the implementation of efficient traffic generators. We feel that there is a strong demand for traffic generators capable to reproduce realistic traffic patterns according to theoretical models and at the same time with high performance. This work presents an open distributed platform for traffic generation that we called distributed internet traffic generator (D-ITG), capable of producing traffic (network, transport and application layer) at packet level and of accurately replicating appropriate stochastic processes for both inter departure time (IDT) and packet size (PS) random variables. We implemented two different versions of our distributed generator. In the first one, a log server is in charge of recording the information transmitted by senders and receivers and these communications are based either on TCP or UDP. In the other one, senders and receivers make use of the MPI library. In this work a complete performance comparison among the centralized version and the two distributed versions of D-ITG is presented

Distributed control of a fault tolerant modular multilevel inverter for direct-drive wind turbine grid interfacing

Modular generator and converter topologies are being pursued for large offshore wind turbines to achieve fault tolerance and high reliability. A centralized controller presents a single critical point of failure which has prevented a truly modular and fault tolerant system from being obtained. This study analyses the inverter circuit control requirements during normal operation and grid fault ride-through, and proposes a distributed controller design to allow inverter modules to operate independently of each other. All the modules independently estimate the grid voltage magnitude and position, and the modules are synchronised together over a CAN bus. The CAN bus is also used to interleave the PWM switching of the modules and synchronise the ADC sampling. The controller structure and algorithms are tested by laboratory experiments with respect to normal operation, initial synchronization to the grid, module fault tolerance and grid fault ride-through

Tradeoffs between AC power quality and DC bus ripple for 3-phase 3-wire inverter-connected devices within microgrids

Visions of future power systems contain high penetrations of inverters which are used to convert power from dc (direct current) to ac (alternating current) or vice versa. The behavior of these devices is dependent upon the choice and implementation of the control algorithms. In particular, there is a tradeoff between dc bus ripple and ac power quality. This study examines the tradeoffs. Four control modes are examined. Mathematical derivations are used to predict the key implications of each control mode. Then, an inverter is studied both in simulation and in hardware at the 10 kVA scale, in different microgrid environments of grid impedance and power quality. It is found that voltage-drive mode provides the best ac power quality, but at the expense of high dc bus ripple. Sinusoidal current generation and dual-sequence controllers provide relatively low dc bus ripple and relatively small effects on power quality. High-bandwidth dc bus ripple minimization mode works well in environments of low grid impedance, but is highly unsuitable within higher impedance microgrid environments and/or at low switching frequencies. The findings also suggest that the certification procedures given by G5/4, P29 and IEEE 1547 are potentially not adequate to cover all applications and scenarios

European White Book on Real-Time Power Hardware in the Loop Testing : DERlab Report No. R- 005.0

The European White Book on Real-Time-Powerhardware-in-the-Loop testing is intended to serve as a reference document on the future of testing of electrical power equipment, with specifi c focus on the emerging hardware-in-the-loop activities and application thereof within testing facilities and procedures. It will provide an outlook of how this powerful tool can be utilised to support the development, testing and validation of specifi cally DER equipment. It aims to report on international experience gained thus far and provides case studies on developments and specifi c technical issues, such as the hardware/software interface. This white book compliments the already existing series of DERlab European white books, covering topics such as grid-inverters and grid-connected storag