Filtering for nonlinear genetic regulatory networks with stochastic disturbances

In this paper, the filtering problem is investigated for nonlinear genetic regulatory networks with stochastic disturbances and time delays, where the nonlinear function describing the feedback regulation is assumed to satisfy the sector condition, the stochastic perturbation is in the form of a scalar Brownian motion, and the time delays exist in both the translation process and the feedback regulation process. The purpose of the addressed filtering problem is to estimate the true concentrations of the mRNA and protein. Specifically, we are interested in designing a linear filter such that, in the presence of time delays, stochastic disturbances as well as sector nonlinearities, the filtering dynamics of state estimation for the stochastic genetic regulatory network is exponentially mean square stable with a prescribed decay rate lower bound beta. By using the linear matrix inequality (LMI) technique, sufficient conditions are first derived for ensuring the desired filtering performance for the gene regulatory model, and the filter gain is then characterized in terms of the solution to an LMI, which can be easily solved by using standard software packages. A simulation example is exploited in order to illustrate the effectiveness of the proposed design procedures

CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit

This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits and drawbacks, the paper proposes a synthesis approach for PWL dynamic systems, based on state-variable methods, and identifies the associated analog operators. The GmC approach, combining quasi-linear VCCS's, PWL VCCS's, and capacitors is then explored regarding the implementation of these operators. CMOS basic building blocks for the realization of the quasi-linear VCCS's and PWL VCCS's are presented and applied to design a Chua's circuit IC. The influence of GmC parasitics on the performance of dynamic PWL systems is illustrated through this example. Measured chaotic attractors from a Chua's circuit prototype are given. The prototype has been fabricated in a 2.4- mu m double-poly n-well CMOS technology, and occupies 0.35 mm/sup 2/, with a power consumption of 1.6 mW for a +or-2.5-V symmetric supply. Measurements show bifurcation toward a double-scroll Chua's attractor by changing a bias current

Nonlinear microwave simulation techniques

The design of high performance circuits with short manufacturing cycles and low cost demands reliable analysis tools, capable to accurately predict the circuit behaviour prior to manufacturing. In the case of nonlinear circuits, the user must be aware of the possible coexistence of different steady-state solutions for the same element values and the fact that steady-state methods, such as harmonic balance, may converge to unstable solutions that will not be observed experimentally. In this contribution, the main numerical iterative methods for nonlinear analysis, including time-domain integrations, shooting, harmonic balance and envelope transient, are briefly presented and compared. The steady-state methods must be complemented with a stability steady-state analysis to verify the physical existence of the solution. This stability analysis can also be combined with the use of auxiliary generators to simulate the circuit self-oscillation and predict qualitative changes in the solution under the continuous variation of a parameter. The methods will be applied to timely circuit examples that are demanding from the nonlinear analysis point of view.This work has been supported by the Spanish Government under contract TEC2014-60283-C3-1-R and the Parliament of Cantabria (12.JP02.64069)

The design of a multilevel envelope tracking amplifier based on a multiphase buck converter

Envelope Tracking (ET) and Envelope Elimination and Restoration (EER) are techniques that have gained in importance in the last decade in order to obtain highly efficient Radio Frequency Power Amplifier (RFPA) that transmits signals with high Peak to Average Power Ratio (PAPR). In this work a multilevel multiphase buck converter is presented as a solution for the envelope amplifier used in ET and EER. The presented multiphase buck converter generates multilevel voltage using “node” duty cycles and non-linear control. In this way the multilevel is implemented using only one simple power stage. However, the complexity of the multilevel converter implementation has been shifted from complicated power topologies to complicated digital control. Detailed discussion regarding the influence of the design parameters (switching frequency, output filter, time resolution of the digital control) on the performance of the proposed envelope amplifier is presented. The design of the output filter is conducted fulfilling the constraints of the envelope slew rate and minimum driver pulse that can be reproduced. In the cases when these two constraints cannot be fulfilled, they may be relieved by the modified control that is presented and experimentally validated. Finally, in order to validate the concept, a prototype has been designed and integrated with a nonlinear class F amplifier. Efficiency measurements showed that by employing EER it is possible to save up to 15% of power losses, comparing to the case when it is supplied by a constant voltage. Additionally, Adjacent Channel Power Ratio (ACPR) has been measured. The obtained results showed the value higher than 30dB for signals up to 5 MHz of bandwidth, without using predistortion technique

The nonlinear class-E amplifier: a case study of harmonic balance applied to switched circuits

Nonlinear switched circuits are usually analyzed in the time domain. The use of frequency-domain methods to analyze the steady-state of switched circuits is usually restricted to linear circuits and, although Volterra series approaches are applied to the distortion of nonlinear switched circuits, the use of harmonic balance (HB) methods in nonlinear switched circuits seems to be marginal if not discarded. In this paper, we analyze the nonlinear class-E amplifier with an ideal switch by means of the HB method. We show how the switching function may be carefully chosen to improve the accuracy of the solution. When the circuit achieves actual class-E operation, the method converges better and is more accurate than classical timedomain methods. We conclude that the HB method is an alternative to time-domain methods that can be used to analyze the class-E amplifier in its expected operation mode.Postprint (published version

34th Midwest Symposium on Circuits and Systems-Final Program

Organized by the Naval Postgraduate School Monterey California. Cosponsored by the IEEE Circuits and Systems Society. Symposium Organizing Committee: General Chairman-Sherif Michael, Technical Program-Roberto Cristi, Publications-Michael Soderstrand, Special Sessions- Charles W. Therrien, Publicity: Jeffrey Burl, Finance: Ralph Hippenstiel, and Local Arrangements: Barbara Cristi