Equalization of Third-Order Intermodulation Products in Wideband Direct Conversion Receivers

This paper reports a SAW-less direct-conversion receiver which utilizes a mixed-signal feedforward path to regenerate and adaptively cancel IM3 products, thus accomplishing system-level linearization. The receiver system performance is dominated by a custom integrated RF front end implemented in 130-nm CMOS and achieves an uncorrected out-of-band IIP3 of -7.1 dBm under the worst-case UMTS FDD Region 1 blocking specifications. Under IM3 equalization, the receiver achieves an effective IIP3 of +5.3 dBm and meets the UMTS BER sensitivity requirement with 3.7 dB of margin

Design and characterization of downconversion mixers and the on-chip calibration techniques for monolithic direct conversion radio receivers

This thesis consists of eight publications and an overview of the research topic, which is also a summary of the work. The research described in this thesis is focused on the design of downconversion mixers and direct conversion radio receivers for UTRA/FDD WCDMA and GSM standards. The main interest of the work is in the 1-3 GHz frequency range and in the Silicon and Silicon-Germanium BiCMOS technologies. The RF front-end, and especially the mixer, limits the performance of direct conversion architecture. The most stringent problems are involved in the second-order distortion in mixers to which special attention has been given. The work introduces calibration techniques to overcome these problems. Some design considerations for front-end radio receivers are also given through a mixer-centric approach. The work summarizes the design of several downconversion mixers. Three of the implemented mixers are integrated as the downconversion stages of larger direct conversion receiver chips. One is realized together with the LNA as an RF front-end. Also, some stand-alone structures have been characterized. Two of the mixers that are integrated together with whole analog receivers include calibration structures to improve the second-order intermodulation rejection. A theoretical mismatch analysis of the second-order distortion in the mixers is also presented in this thesis. It gives a comprehensive illustration of the second-order distortion in mixers. It also gives the relationships between the dc-offsets and high IIP2. In addition, circuit and layout techniques to improve the LO-to-RF isolation are discussed. The presented work provides insight into how the mixer immunity against the second-order distortion can be improved. The implemented calibration structures show promising performance. On the basis of these results, several methods of detecting the distortion on-chip and the possibilities of integrating the automatic on-chip calibration procedures to produce a repeatable and well-predictable receiver IIP2 are presented.reviewe

Radio frequency front-end circuits for W-CDMA direct conversion receiver

Master'sMASTER OF ENGINEERIN

Multi-stage noise shaping (MASH) delta-sigma modulators for wideband and multi-standard applications

Imperial Users onl

Intelligent genetic algorithms for next-generation broadband multi-carrier CDMA wireless networks

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.This dissertation proposes a novel intelligent system architecture for next-generation broadband multi-carrier CDMA wireless networks. In our system, two novel and similar intelligent genetic algorithms, namely Minimum Distance guided GAs (MDGAs) are invented for both peak-to-average power ratio (PAPR) reduction at the transmitter side and multi-user detection (MUD) at the receiver side. Meanwhile, we derive a theoretical BER performance analysis for the proposed MC-CDMA system in A WGN channel. Our analytical results show that the theoretical BER performance of synchronized MC-CDMA system is the same as that of the synchronized DS-CDMA system which is also used as a theoretical guidance of our novel MUD receiver design. In contrast to traditional GAs, our MDGAs start with a balanced ratio of exploration and exploitation which is maintained throughout the process. In our algorithms, a new replacement strategy is designed which increases significantly the convergence rate and reduces dramatically computational complexity as compared to the conventional GAs. The simulation results demonstrate that, if compared to those schemes using exhaustive search and traditional GAs, (1) our MDGA-based P APR reduction scheme achieves 99.52% and 50+% reductions in computational complexity, respectively; (2) our MDGA-based MUD scheme achieves 99.54% and 50+% reductions in computational complexity, respectively. The use of one core MDGA solution for both issues can ease the hardware design and dramatically reduce the implementation cost in practice