Plataforma de teste para MEMS

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e ComputadoresO principal propósito desta dissertação é o desenvolvimento de uma plataforma versátil para testar Sistemas MicroEletroMecânicos (MEMS) através da geração e leitura de estímulos elétricos. Por definição MEMS são estruturas com componentes e propriedades elétricas e mecânicas, por isso é necessário testar estas estruturas em todas as fases de desenvolvimento (desenho, produção e calibração). Enquanto que o tempo de teste não é um requisito na fase de desenho, este torna-se um especialmente crítico nas outras fases. Este modelo de testes, que aplica e lê sinais elétricos ao nível de bolachas de silício, teve início na indústria dos circuitos integrados tendo agora de ser integrado na indústria de MEMS, sendo que já existem algumas soluções de teste, como por exemplo o apresentado pela ITMEMS. A plataforma desenvolvida nesta dissertação, tem um amplificador de carga de ganho variável para converter capacidade em tensão, um amplificador lock-in digital e uma interface com o computador que utiliza TCP/IP. Esta interface assegura a transferência até 100 Mbits/s com fiabilidade, gerando assim uma saída do sistema com mais de 1 MHz de taxa de amostragem e 16 bits de resolução em tempo real. O resultado deste trabalho apresenta duas características essenciais para teste de MEMS, apresentando uma interface fácil e intuitiva para o utilizador, implementada num computador utilizando o MATLAB e um amplificador lock-in integrado para descodificar sinais modulados em amplitude.The main purpose of this thesis is to develop a versatile platform to test MicroElectroMechanical Systems (MEMS) by injecting and reading electrical stimuli. By definition MEMS are structures with electrical and mechanical components and properties, and therefore it is necessary to test these structures in every stage of development (design, manufacturing, calibration). While time is not a particular specification on design phase, this becomes an absolutely critical specification in other phases. This type of testing methodology begun in IC industry, by applying and reading electrical signals in IC wafers. For MEMS devices there are already a few solutions such as the one presented by ITMEMS. The developed platform has a gain variable capacitance to voltage converter, a digital lock-in amplifier and a PC interface using TCP/IP. This interface ensures a reliable data transfer up to 100 Mbits per second, thus generating an output of 1 MHz sample rate up to 16 bits in realtime. The result of this work implementstwo important features for MEMS testing presenting a pleasant and friendly user-interface, in one PC using MATLAB, and an integrated lock-in amplifier to decode amplitude modulated signals

Plataforma de teste para MEMS

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e ComputadoresO principal propósito desta dissertação é o desenvolvimento de uma plataforma versátil para testar Sistemas MicroEletroMecânicos (MEMS) através da geração e leitura de estímulos elétricos. Por definição MEMS são estruturas com componentes e propriedades elétricas e mecânicas, por isso é necessário testar estas estruturas em todas as fases de desenvolvimento (desenho, produção e calibração). Enquanto que o tempo de teste não é um requisito na fase de desenho, este torna-se um especialmente crítico nas outras fases. Este modelo de testes, que aplica e lê sinais elétricos ao nível de bolachas de silício, teve início na indústria dos circuitos integrados tendo agora de ser integrado na indústria de MEMS, sendo que já existem algumas soluções de teste, como por exemplo o apresentado pela ITMEMS. A plataforma desenvolvida nesta dissertação, tem um amplificador de carga de ganho variável para converter capacidade em tensão, um amplificador lock-in digital e uma interface com o computador que utiliza TCP/IP. Esta interface assegura a transferência até 100 Mbits/s com fiabilidade, gerando assim uma saída do sistema com mais de 1 MHz de taxa de amostragem e 16 bits de resolução em tempo real. O resultado deste trabalho apresenta duas características essenciais para teste de MEMS, apresentando uma interface fácil e intuitiva para o utilizador, implementada num computador utilizando o MATLAB e um amplificador lock-in integrado para descodificar sinais modulados em amplitude.The main purpose of this thesis is to develop a versatile platform to test MicroElectroMechanical Systems (MEMS) by injecting and reading electrical stimuli. By definition MEMS are structures with electrical and mechanical components and properties, and therefore it is necessary to test these structures in every stage of development (design, manufacturing, calibration). While time is not a particular specification on design phase, this becomes an absolutely critical specification in other phases. This type of testing methodology begun in IC industry, by applying and reading electrical signals in IC wafers. For MEMS devices there are already a few solutions such as the one presented by ITMEMS. The developed platform has a gain variable capacitance to voltage converter, a digital lock-in amplifier and a PC interface using TCP/IP. This interface ensures a reliable data transfer up to 100 Mbits per second, thus generating an output of 1 MHz sample rate up to 16 bits in realtime. The result of this work implementstwo important features for MEMS testing presenting a pleasant and friendly user-interface, in one PC using MATLAB, and an integrated lock-in amplifier to decode amplitude modulated signals

1-Bit processing based model predictive control for fractionated satellite missions

In this thesis, a 1-bit processing based Model Predictive Control (OBMPC) structure is proposed for a fractionated satellite attitude control mission. Despite the appealing advantages of the MPC algorithm towards constrained MIMO control applications, implementing the MPC algorithm onboard a small satellite is certainly challenging due to the limited onboard resources. The proposed design is based on the 1-bit processing concept, which takes advantage of the affine relation between the 1-bit state feedback and multi-bit parameters to implement a multiplier free MPC controller. As multipliers are the major power consumer in online optimization, the OBMPC structure is proven to be more efficient in comparison to the conventional MPC implementation in term of power and circuit complexity. The system is in digital control nature, affected by quantization noise introduced by Δ∑ modulators. The stability issues and practical design criteria are also discussed in this work. Some other aspects are considered in this work to complete the control system. Firstly, the implementation of the OBMPC system relies on the 1-bit state feedbacks. Hence, 1-bit sensing components are needed to implement the OBMPC system. While the ∆∑ modulator based Microelectromechanical systems (MEMS) gyroscope is considered in this work, it is possible to implement this concept into other sensing components. Secondly, as the proposed attitude mission is based on the wireless inter-satellite link (ISL), a state estimator is required. However, conventional state estimators will once again introduce multi-bit signals, and compromise the simple, direct implementation of the OBMPC controller. Therefore, the 1-bit state estimator is also designed in this work to satisfy the requirements of the proposed fractionated attitude control mission. The simulation for the OBMPC is based on a 2U CubeSat model in a fractionated satellite structure, in which the payload and actuators are separated from the controller and controlled via the ISL. Matlab simulations and FPGA implementation based performance analysis shows that the OBMPC is feasible for fractionated satellite missions and is advantageous over the conventional MPC controllers

1-Bit processing based model predictive control for fractionated satellite missions

In this thesis, a 1-bit processing based Model Predictive Control (OBMPC) structure is proposed for a fractionated satellite attitude control mission. Despite the appealing advantages of the MPC algorithm towards constrained MIMO control applications, implementing the MPC algorithm onboard a small satellite is certainly challenging due to the limited onboard resources. The proposed design is based on the 1-bit processing concept, which takes advantage of the affine relation between the 1-bit state feedback and multi-bit parameters to implement a multiplier free MPC controller. As multipliers are the major power consumer in online optimization, the OBMPC structure is proven to be more efficient in comparison to the conventional MPC implementation in term of power and circuit complexity. The system is in digital control nature, affected by quantization noise introduced by Δ∑ modulators. The stability issues and practical design criteria are also discussed in this work. Some other aspects are considered in this work to complete the control system. Firstly, the implementation of the OBMPC system relies on the 1-bit state feedbacks. Hence, 1-bit sensing components are needed to implement the OBMPC system. While the ∆∑ modulator based Microelectromechanical systems (MEMS) gyroscope is considered in this work, it is possible to implement this concept into other sensing components. Secondly, as the proposed attitude mission is based on the wireless inter-satellite link (ISL), a state estimator is required. However, conventional state estimators will once again introduce multi-bit signals, and compromise the simple, direct implementation of the OBMPC controller. Therefore, the 1-bit state estimator is also designed in this work to satisfy the requirements of the proposed fractionated attitude control mission. The simulation for the OBMPC is based on a 2U CubeSat model in a fractionated satellite structure, in which the payload and actuators are separated from the controller and controlled via the ISL. Matlab simulations and FPGA implementation based performance analysis shows that the OBMPC is feasible for fractionated satellite missions and is advantageous over the conventional MPC controllers

A Digitalized Silicon Microgyroscope Based on Embedded FPGA

This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high-speed 18-bit analog to digital convertor, a high-performance core Field Programmable Gate Array (FPGA) chip and other peripherals such as high-speed serial ports for transmitting data. In drive mode, the closed-loop drive circuit are implemented by automatic gain control (AGC) loop and software phase-locked loop (SPLL) based on the Coordinated Rotation Digital Computer (CORDIC) algorithm. Meanwhile, the sense demodulation module based on varying step least mean square demodulation (LMSD) are addressed in detail. All kinds of algorithms are simulated by Simulink and DSPbuilder tools, which is in good agreement with the theoretical design. The experimental results have fully demonstrated the stability and flexibility of the system