Readiness of Quantum Optimization Machines for Industrial Applications

There have been multiple attempts to demonstrate that quantum annealing and, in particular, quantum annealing on quantum annealing machines, has the potential to outperform current classical optimization algorithms implemented on CMOS technologies. The benchmarking of these devices has been controversial. Initially, random spin-glass problems were used, however, these were quickly shown to be not well suited to detect any quantum speedup. Subsequently, benchmarking shifted to carefully crafted synthetic problems designed to highlight the quantum nature of the hardware while (often) ensuring that classical optimization techniques do not perform well on them. Even worse, to date a true sign of improved scaling with the number of problem variables remains elusive when compared to classical optimization techniques. Here, we analyze the readiness of quantum annealing machines for real-world application problems. These are typically not random and have an underlying structure that is hard to capture in synthetic benchmarks, thus posing unexpected challenges for optimization techniques, both classical and quantum alike. We present a comprehensive computational scaling analysis of fault diagnosis in digital circuits, considering architectures beyond D-wave quantum annealers. We find that the instances generated from real data in multiplier circuits are harder than other representative random spin-glass benchmarks with a comparable number of variables. Although our results show that transverse-field quantum annealing is outperformed by state-of-the-art classical optimization algorithms, these benchmark instances are hard and small in the size of the input, therefore representing the first industrial application ideally suited for testing near-term quantum annealers and other quantum algorithmic strategies for optimization problems.Comment: 22 pages, 12 figures. Content updated according to Phys. Rev. Applied versio

A new Low-Power recoding algorithm for multiplierless single/multiple constant multiplication.

International audienceOptimizing the number of additions in constant coefficient multiplication is conjectured to be a NP-hard problem. In this paper, we report a new heuristic requiring an average of 29.10 % and 10.61 % less additions than the standard canonical signed digit representation (CSD) and the double base number system (DBNS), respectively, for 64-bit coefficients. The maximum number of additions per coefficient is bounded by (N/4)+2, and the time-complexity of the recoding is linearly proportional to N, where N is the bit-size of the constant. These performances are achieved using a new redundant version of radix-28 recoding

Optimization Algorithms For The Multiple Constant Multiplications Problem

(Doktora) -- İstanbul Teknik Üniversitesi, Fen Bilimleri Enstitüsü, 2009(PhD) -- İstanbul Technical University, Institute of Science and Technology, 2009Bu tezde, birden fazla katsayının çarpımı (MCM) problemi, bir başka deyişle, bir değişkenin birden fazla katsayı ile çarpımının minimum sayıda toplama/çıkarma işlemi kullanılarak gerçeklenmesi için tasarlanmış kesin ve yaklaşık algoritmalar sunulmaktadır. Bir kesin alt ifade eliminasyonu (CSE) algoritmasının tasarımında, MCM problemini bir 0-1 tamsayı lineer programlama problemi olarak modelleyen daha önceden önerilmiş bir algoritma temel alınmıştır. Kesin CSE algoritması içinde, alan ve gecikme ölçütlerini ele alabilmek için yeni bir kesin model önerilmektedir. Kesin CSE algoritması tarafından taranacak arama uzayını küçültmek için problem indirgeme ve model basitleştirme teknikleri sunulmaktadır. Bu tekniklerin kullanımının kesin CSE algoritmasının daha büyük örnekler üzerinde uygulanmasına olanak sağladığı gösterilmektedir. Ayrıca, bu teknikler ile donatılmış kesin CSE algoritması, katsayıları genel sayı gösteriminde ele alacak ve kesin CSE algoritmasından daha iyi sonuçlar elde edecek şekilde genişletilmektedir. Bunların yanında, gerçek boyutlu örnekler üzerinde uygulanabilen bir kesin graf tabanlı algoritma sunulmaktadır. Bu kesin algoritmalara ek olarak, minimum sonuçlara oldukça yakın çözümler bulabilen ve kesin algoritmaların ele almakta zorlandığı örneklere uygulanabilen yaklaşık CSE ve graf tabanlı algoritmalar verilmektedir. Bu tezde önerilen kesin ve yaklaşık algoritmaların daha önceden önerilmiş sezgisel yöntemlerden daha iyi sonuçlar verdiği gösterilmektedir. Bunların yanısıra, bu tezde, kesin CSE algoritması gecikme kısıtı altında alanın minimize edilmesi, kapı seviyesinde alanın minimize edilmesi ve yüksek hızlı sayısal sonlu impuls cevaplı filtrelerin tasarımında alanın optimize edilmesi problemlerine uygulanmaktadır.In this thesis, exact and approximate algorithms designed for the multiple constant multiplications (MCM) problem, i.e., the implementation of the multiplication of a variable with multiple constants using minimum number of addition/subtraction operations, are introduced. In the design of an exact common subexpression elimination (CSE) algorithm, we relied on the previously proposed algorithm that models the MCM problem as a 0-1 integer linear programming problem. To handle the area and delay parameters in the exact CSE algorithm, a new exact model is proposed. To reduce the search space to be explored by the exact algorithm, problem reduction and model simplification techniques are introduced. It is shown that the use of these techniques enable the exact CSE algorithm to be applied on larger size instances. Also, the exact CSE algorithm equipped with these techniques is extended to handle the constants under general number representation yielding better solutions than those of the exact CSE algorithm. Besides, an exact graph-based algorithm that can be applied on real size instances is introduced. In addition to the exact algorithms, approximate CSE and graph-based algorithms that find similar results with the minimum solutions and can be applied on instances that the exact algorithms cannot deal with are presented. It is shown that the exact and approximate algorithms proposed in this thesis give better solutions than those of the previously proposed heuristic algorithms. Furthermore, in this thesis, the exact CSE algorithm is applied on the minimization of area under a delay constraint, the minimization of area at gate-level, and the optimization of area in high-speed digital finite impulse response filters synthesis problems.DoktoraPh

Radix-2r Arithmetic for Multiplication by a Constant.

International audienceIn this paper, radix-2r arithmetic is explored to minimize the number of additions in the multiplication by a constant. We provide the formal proof that for an N-bit constant, the maximum number of additions using radix-2r is lower than Dimitrov's estimated upper-bound (2.N/log(N)) using double base number system (DBNS). In comparison to canonical signed digit (CSD) and DBNS, the new radix-2r recoding requires an average of 23.12% and 3.07% less additions for 64-bit constant, respectively

Precision analysis for hardware acceleration of numerical algorithms

The precision used in an algorithm affects the error and performance of individual computations, the memory usage, and the potential parallelism for a fixed hardware budget. However, when migrating an algorithm onto hardware, the potential improvements that can be obtained by tuning the precision throughout an algorithm to meet a range or error specification are often overlooked; the major reason is that it is hard to choose a number system which can guarantee any such specification can be met. Instead, the problem is mitigated by opting to use IEEE standard double precision arithmetic so as to be ‘no worse’ than a software implementation. However, the flexibility in the number representation is one of the key factors that can be exploited on reconfigurable hardware such as FPGAs, and hence ignoring this potential significantly limits the performance achievable. In order to optimise the performance of hardware reliably, we require a method that can tractably calculate tight bounds for the error or range of any variable within an algorithm, but currently only a handful of methods to calculate such bounds exist, and these either sacrifice tightness or tractability, whilst simulation-based methods cannot guarantee the given error estimate. This thesis presents a new method to calculate these bounds, taking into account both input ranges and finite precision effects, which we show to be, in general, tighter in comparison to existing methods; this in turn can be used to tune the hardware to the algorithm specifications. We demonstrate the use of this software to optimise hardware for various algorithms to accelerate the solution of a system of linear equations, which forms the basis of many problems in engineering and science, and show that significant performance gains can be obtained by using this new approach in conjunction with more traditional hardware optimisations