Modern Diagnostics Techniques for Electrical Machines, Power Electronics, and Drives

© 2015 IEEE. Personal use of this material is permitted. Permissíon from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertisíng or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.[EN] For the last ten years, at least three different special sections dealing with diagnostics in power electrical engineering have been published in the IEEE transactions on industrial electronics [1]-[5]. All of them had their specificities, but the last ones, starting in 2011, were more connected to relevant events organized on the topic. In fact, these events have been clearly the only international forums fully dedicated to diagnostics techniques in power electrical engineering. For this particular issue, it has been decided to separate the different submissions into six parts: state of the art; general methods; induction machines (IMs); synchronous machines (SMs); . electrical drives; power components and power converters. The second section includes only one state-of-the-art paper, which is dedicated to actual techniques implemented in both industry and research laboratories. The third section includes three papers on diagnostic techniques not specifically aimed at a particular type of machine. The fourth section includes three papers devoted to diagnostics of rotor faults, two dedicated to stator insulation issues, and four papers dealing with mechanical faults diagnosis in IMs. The fifth section includes papers focusing on different types of SMs. The first two papers deal with wound-rotor SMs, the following three papers are dedicated to permanent-magnet radial flux machines, and the last one deals with permanent-magnet axial flux machines. Regarding the types of faults analyzed, there are three papers devoted to the diagnosis of interturn short circuits in the stator windings, i.e., one dedicated to the detection and location of field-winding-to-ground faults and a paper devoted to the diagnosis of static eccentricities. In the sixth section, two papers investigate issues related to faults in drive sensors, and one is devoted to fault detections in the coupling inductors. The last section includes two papers devoted to diagnosis of faults and losses analysis in switching components of power converters.Capolino, G.; Antonino-Daviu, J.; Riera-Guasp, M. (2015). Modern Diagnostics Techniques for Electrical Machines, Power Electronics, and Drives. IEEE Transactions on Industrial Electronics. 62(3):1738-1745. doi:10.1109/TIE.2015.2391186S1738174562

Fault diagnosis of gearboxes using wavelet support vector machine, least square support vector machine and wavelet packet transform

This work focuses on a method which experimentally recognizes faults of gearboxes using wavelet packet and two support vector machine models. Two wavelet selection criteria are used. Some statistical features of wavelet packet coefficients of vibration signals are selected. The optimal decomposition level of wavelet is selected based on the Maximum Energy to Shannon Entropy ratio criteria. In addition to this, Energy and Shannon Entropy of the wavelet coefficients are used as two new features along with other statistical parameters as input of the classifier. Eventually, the gearbox faults are classified using these statistical features as input to least square support vector machine (LSSVM) and wavelet support vector machine (WSVM). Some kernel functions and multi kernel function as a new method are used with three strategies for multi classification of gearboxes. The results of fault classification demonstrate that the WSVM identified the fault categories of gearbox more accurately and has a better diagnosis performance as compared to the LSSVM

HEALTH ESTIMATION AND REMAINING USEFUL LIFE PREDICTION OF ELECTRONIC CIRCUIT WITH A PARAMETRIC FAULT

Degradation of electronic components is typically accompanied by a deviation in their electrical parameters from their initial values. Such parametric drifts in turn will cause degradation in performance of the circuit they are part of, eventually leading to function failure due to parametric faults. The existing approaches for predicting failures resulting from electronic component parametric faults emphasize identifying monotonically deviating parameters and modeling their progression over time. However, in practical applications where the components are integrated into a complex electronic circuit assembly, product or system, it is generally not feasible to monitor component-level parameters. To address this problem, a prognostics method that exploits features extracted from responses of circuit-comprising components exhibiting parametric faults is developed in this dissertation. The developed prognostic method constitutes a circuit health estimation step followed by a degradation modeling and remaining useful life (RUL) prediction step. First, the circuit health estimation method was developed using a kernel-based machine learning technique that exploits features that are extracted from responses of circuit-comprising components exhibiting parametric faults, instead of the component-level parameters. The performance of kernel learning technique depends on the automatic adaptation of hyperparameters (i.e., regularization and kernel parameters) to the learning features. Thus, to achieve high accuracy in health estimation the developed method also includes an optimization method that employs a penalized likelihood function along with a stochastic filtering technique for automatic adaptation of hyperparameters. Second, the prediction of circuit’s RUL is realized by a model-based filtering method that relies on a first principles-based model and a stochastic filtering technique. The first principles-based model describes the degradation in circuit health with progression of parametric fault in a circuit component. The stochastic filtering technique on the other hand is used to first solve a joint ‘circuit health state—parametric fault’ estimation problem, followed by prediction problem in which the estimated ‘circuit health state—parametric fault’ is propagated forward in time to predict RUL. Evaluations of the data from simulation experiments on a benchmark Sallen–Key filter circuit and a DC–DC converter system demonstrate the ability of the developed prognostic method to estimate circuit health and predict RUL without having to monitor the individual component parameters

Digital Image Processing

Digital image processing is the use of a digital computer to process a digital image using an algorithm. As a subcategory or area of digital signal processing, digital image processing has many advantages over analog image processing. It allows a much wider range of algorithms to be applied to the input data and can avoid problems such as noise accumulation and distortion during processing. This review article provides a comprehensive literature review of various image processing techniques along with a brief introduction to digital image processing that defines its scope and importance, thereby highlighting the importance of its use in the field of electronic engineering applications that are used in today\u27s commercial and industrial scenarios. It takes into consideration the research work done by various leading scholars in the field of electronic engineering and also the description of various software tools like MATLAB which is used for the practical implementation of the given problem lying in its domain

Algorithms for Fault Detection and Diagnosis

Due to the increasing demand for security and reliability in manufacturing and mechatronic systems, early detection and diagnosis of faults are key points to reduce economic losses caused by unscheduled maintenance and downtimes, to increase safety, to prevent the endangerment of human beings involved in the process operations and to improve reliability and availability of autonomous systems. The development of algorithms for health monitoring and fault and anomaly detection, capable of the early detection, isolation, or even prediction of technical component malfunctioning, is becoming more and more crucial in this context. This Special Issue is devoted to new research efforts and results concerning recent advances and challenges in the application of “Algorithms for Fault Detection and Diagnosis”, articulated over a wide range of sectors. The aim is to provide a collection of some of the current state-of-the-art algorithms within this context, together with new advanced theoretical solutions

Neural Network Methods for Radiation Detectors and Imaging

Recent advances in image data processing through machine learning and especially deep neural networks (DNNs) allow for new optimization and performance-enhancement schemes for radiation detectors and imaging hardware through data-endowed artificial intelligence. We give an overview of data generation at photon sources, deep learning-based methods for image processing tasks, and hardware solutions for deep learning acceleration. Most existing deep learning approaches are trained offline, typically using large amounts of computational resources. However, once trained, DNNs can achieve fast inference speeds and can be deployed to edge devices. A new trend is edge computing with less energy consumption (hundreds of watts or less) and real-time analysis potential. While popularly used for edge computing, electronic-based hardware accelerators ranging from general purpose processors such as central processing units (CPUs) to application-specific integrated circuits (ASICs) are constantly reaching performance limits in latency, energy consumption, and other physical constraints. These limits give rise to next-generation analog neuromorhpic hardware platforms, such as optical neural networks (ONNs), for high parallel, low latency, and low energy computing to boost deep learning acceleration

Fault diagnosis of gearboxes using wavelet support vector machine, least square support vector machine and wavelet packet transform

This work focuses on a method which experimentally recognizes faults of gearboxes using wavelet packet and two support vector machine models. Two wavelet selection criteria are used. Some statistical features of wavelet packet coefficients of vibration signals are selected. The optimal decomposition level of wavelet is selected based on the Maximum Energy to Shannon Entropy ratio criteria. In addition to this, Energy and Shannon Entropy of the wavelet coefficients are used as two new features along with other statistical parameters as input of the classifier. Eventually, the gearbox faults are classified using these statistical features as input to least square support vector machine (LSSVM) and wavelet support vector machine (WSVM). Some kernel functions and multi kernel function as a new method are used with three strategies for multi classification of gearboxes. The results of fault classification demonstrate that the WSVM identified the fault categories of gearbox more accurately and has a better diagnosis performance as compared to the LSSVM

Security Aspects of Printed Electronics Applications

Gedruckte Elektronik (Printed Electronics (PE)) ist eine neu aufkommende Technologie welche komplementär zu konventioneller Elektronik eingesetzt wird. Dessen einzigartigen Merkmale führten zu einen starken Anstieg von Marktanteilen, welche 2010 \$6 Milliarden betrugen, \$41 Milliarden in 2019 und in 2027 geschätzt \$153 Milliarden. Gedruckte Elektronik kombiniert additive Technologien mit funktionalen Tinten um elektronische Komponenten aus verschiedenen Materialien direkt am Verwendungsort, kosteneffizient und umweltfreundlich herzustellen. Die dabei verwendeten Substrate können flexibel, leicht, transparent, großflächig oder implantierbar sein. Dadurch können mit gedruckter Elektronik (noch) visionäre Anwendungen wie Smart-Packaging, elektronische Einmalprodukte, Smart Labels oder digitale Haut realisiert werden. Um den Fortschritt von gedruckten Elektronik-Technologien voranzutreiben, basierten die meisten Optimierungen hauptsächlich auf der Erhöhung von Produktionsausbeute, Reliabilität und Performance. Jedoch wurde auch die Bedeutung von Sicherheitsaspekten von Hardware-Plattformen in den letzten Jahren immer mehr in den Vordergrund gerückt. Da realisierte Anwendungen in gedruckter Elektronik vitale Funktionalitäten bereitstellen können, die sensible Nutzerdaten beinhalten, wie zum Beispiel in implantierten Geräten und intelligenten Pflastern zur Gesundheitsüberwachung, führen Sicherheitsmängel und fehlendes Produktvertrauen in der Herstellungskette zu teils ernsten und schwerwiegenden Problemen. Des Weiteren, wegen den charakteristischen Merkmalen von gedruckter Elektronik, wie zum Beispiel additive Herstellungsverfahren, hohe Strukturgröße, wenige Schichten und begrenzten Produktionsschritten, ist gedruckte Hardware schon per se anfällig für hardware-basierte Attacken wie Reverse-Engineering, Produktfälschung und Hardware-Trojanern. Darüber hinaus ist die Adoption von Gegenmaßnahmen aus konventionellen Technologien unpassend und ineffizient, da solche zu extremen Mehraufwänden in der kostengünstigen Fertigung von gedruckter Elektronik führen würden. Aus diesem Grund liefert diese Arbeit eine Technologie-spezifische Bewertung von Bedrohungen auf der Hardware-Ebene und dessen Gegenmaßnahmen in der Form von Ressourcen-beschränkten Hardware-Primitiven, um die Produktionskette und Funktionalitäten von gedruckter Elektronik-Anwendungen zu schützen. Der erste Beitrag dieser Dissertation ist ein vorgeschlagener Ansatz um gedruckte Physical Unclonable Functions (pPUF) zu entwerfen, welche Sicherheitsschlüssel bereitstellen um mehrere sicherheitsrelevante Gegenmaßnahmen wie Authentifizierung und Fingerabdrücke zu ermöglichen. Zusätzlich optimieren wir die multi-bit pPUF-Designs um den Flächenbedarf eines 16-bit-Schlüssels-Generators um 31\% zu verringern. Außerdem entwickeln wir ein Analyse-Framework basierend auf Monte Carlo-Simulationen für pPUFs, mit welchem wir Simulationen und Herstellungs-basierte Analysen durchführen können. Unsere Ergebnisse haben gezeigt, dass die pPUFs die notwendigen Eigenschaften besitzen um erfolgreich als Sicherheitsanwendung eingesetzt zu werden, wie Einzigartigkeit der Signatur und ausreichende Robustheit. Der Betrieb der gedruckten pPUFs war möglich bis zu sehr geringen Betriebsspannungen von nur 0.5 V. Im zweiten Beitrag dieser Arbeit stellen wir einen kompakten Entwurf eines gedruckten physikalischen Zufallsgenerator vor (True Random Number Generator (pTRNG)), welcher unvorhersehbare Schlüssel für kryptographische Funktionen und zufälligen "Authentication Challenges" generieren kann. Der pTRNG Entwurf verbessert Prozess-Variationen unter Verwendung von einer Anpassungsmethode von gedruckten Widerständen, ermöglicht durch die individuelle Konfigurierbarkeit von gedruckten Schaltungen, um die generierten Bits nur von Zufallsrauschen abhängig zu machen, und damit ein echtes Zufallsverhalten zu erhalten. Die Simulationsergebnisse legen nahe, dass die gesamten Prozessvariationen des TRNGs um das 110-fache verbessert werden, und der zufallsgenerierte Bitstream der TRNGs die "National Institute of Standards and Technology Statistical Test Suit"-Tests bestanden hat. Auch hier können wir nachweisen, dass die Betriebsspannungen der TRNGs von mehreren Volt zu nur 0.5 V lagen, wie unsere Charakterisierungsergebnisse der hergestellten TRNGs aufgezeigt haben. Der dritte Beitrag dieser Dissertation ist die Beschreibung der einzigartigen Merkmale von Schaltungsentwurf und Herstellung von gedruckter Elektronik, welche sehr verschieden zu konventionellen Technologien ist, und dadurch eine neuartige Reverse-Engineering (RE)-Methode notwendig macht. Hierfür stellen wir eine robuste RE-Methode vor, welche auf Supervised-Learning-Algorithmen für gedruckte Schaltungen basiert, um die Vulnerabilität gegenüber RE-Attacken zu demonstrieren. Die RE-Ergebnisse zeigen, dass die vorgestellte RE-Methode auf zahlreiche gedruckte Schaltungen ohne viel Komplexität oder teure Werkzeuge angewandt werden kann. Der letzte Beitrag dieser Arbeit ist ein vorgeschlagenes Konzept für eine "one-time programmable" gedruckte Look-up Table (pLUT), welche beliebige digitale Funktionen realisieren kann und Gegenmaßnahmen unterstützt wie Camouflaging, Split-Manufacturing und Watermarking um Attacken auf der Hardware-Ebene zu verhindern. Ein Vergleich des vorgeschlagenen pLUT-Konzepts mit existierenden Lösungen hat gezeigt, dass die pLUT weniger Flächen-bedarf, geringere worst-case Verzögerungszeiten und Leistungsverbrauch hat. Um die Konfigurierbarkeit der vorgestellten pLUT zu verifizieren, wurde es simuliert, hergestellt und programmiert mittels Tintenstrahl-gedruckter elektrisch leitfähiger Tinte um erfolgreich Logik-Gatter wie XNOR, XOR und AND zu realisieren. Die Simulation und Charakterisierungsergebnisse haben die erfolgreiche Funktionalität der pLUT bei Betriebsspannungen von nur 1 V belegt