Design and debugging of multi-step analog to digital converters

With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. The trend of increasing integration level for integrated circuits has forced the A/D converter interface to reside on the same silicon in complex mixed-signal ICs containing mostly digital blocks for DSP and control. However, specifications of the converters in various applications emphasize high dynamic range and low spurious spectral performance. It is nontrivial to achieve this level of linearity in a monolithic environment where post-fabrication component trimming or calibration is cumbersome to implement for certain applications or/and for cost and manufacturability reasons. Additionally, as CMOS integrated circuits are accomplishing unprecedented integration levels, potential problems associated with device scaling – the short-channel effects – are also looming large as technology strides into the deep-submicron regime. The A/D conversion process involves sampling the applied analog input signal and quantizing it to its digital representation by comparing it to reference voltages before further signal processing in subsequent digital systems. Depending on how these functions are combined, different A/D converter architectures can be implemented with different requirements on each function. Practical realizations show the trend that to a first order, converter power is directly proportional to sampling rate. However, power dissipation required becomes nonlinear as the speed capabilities of a process technology are pushed to the limit. Pipeline and two-step/multi-step converters tend to be the most efficient at achieving a given resolution and sampling rate specification. This thesis is in a sense unique work as it covers the whole spectrum of design, test, debugging and calibration of multi-step A/D converters; it incorporates development of circuit techniques and algorithms to enhance the resolution and attainable sample rate of an A/D converter and to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover and compensate for the errors continuously. The power proficiency for high resolution of multi-step converter by combining parallelism and calibration and exploiting low-voltage circuit techniques is demonstrated with a 1.8 V, 12-bit, 80 MS/s, 100 mW analog to-digital converter fabricated in five-metal layers 0.18-µm CMOS process. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. Microscopic particles present in the manufacturing environment and slight variations in the parameters of manufacturing steps can all lead to the geometrical and electrical properties of an IC to deviate from those generated at the end of the design process. Those defects can cause various types of malfunctioning, depending on the IC topology and the nature of the defect. To relive the burden placed on IC design and manufacturing originated with ever-increasing costs associated with testing and debugging of complex mixed-signal electronic systems, several circuit techniques and algorithms are developed and incorporated in proposed ATPG, DfT and BIST methodologies. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. With the use of dedicated sensors, which exploit knowledge of the circuit structure and the specific defect mechanisms, the method described in this thesis facilitates early and fast identification of excessive process parameter variation effects. The expectation-maximization algorithm makes the estimation problem more tractable and also yields good estimates of the parameters for small sample sizes. To allow the test guidance with the information obtained through monitoring process variations implemented adjusted support vector machine classifier simultaneously minimize the empirical classification error and maximize the geometric margin. On a positive note, the use of digital enhancing calibration techniques reduces the need for expensive technologies with special fabrication steps. Indeed, the extra cost of digital processing is normally affordable as the use of submicron mixed signal technologies allows for efficient usage of silicon area even for relatively complex algorithms. Employed adaptive filtering algorithm for error estimation offers the small number of operations per iteration and does not require correlation function calculation nor matrix inversions. The presented foreground calibration algorithm does not need any dedicated test signal and does not require a part of the conversion time. It works continuously and with every signal applied to the A/D converter. The feasibility of the method for on-line and off-line debugging and calibration has been verified by experimental measurements from the silicon prototype fabricated in standard single poly, six metal 0.09-µm CMOS process

Dispersive Fourier Transformation for Versatile Microwave Photonics Applications

Abstract: Dispersive Fourier transformation (DFT) maps the broadband spectrum of an ultrashort optical pulse into a time stretched waveform with its intensity profile mirroring the spectrum using chromatic dispersion. Owing to its capability of continuous pulse-by-pulse spectroscopic measurement and manipulation, DFT has become an emerging technique for ultrafast signal generation and processing, and high-throughput real-time measurements, where the speed of traditional optical instruments falls short. In this paper, the principle and implementation methods of DFT are first introduced and the recent development in employing DFT technique for widespread microwave photonics applications are presented, with emphasis on real-time spectroscopy, microwave arbitrary waveform generation, and microwave spectrum sensing. Finally, possible future research directions for DFT-based microwave photonics techniques are discussed as well

Analysis and application of digital spectral warping in analog and mixed-signal testing

Spectral warping is a digital signal processing transform which shifts the frequencies contained within a signal along the frequency axis. The Fourier transform coefficients of a warped signal correspond to frequency-domain 'samples' of the original signal which are unevenly spaced along the frequency axis. This property allows the technique to be efficiently used for DSP-based analog and mixed-signal testing. The analysis and application of spectral warping for test signal generation, response analysis, filter design, frequency response evaluation, etc. are discussed in this paper along with examples of the software and hardware implementation

An adaptive digital caliration of multi-step A/D converters.

A novel digital technique for efficient calibration of static errors in high-speed, high-resolution, multi-step ADCs is proposed. The parameter update within the calibration method is extended to include and correct effects of temperature and process variations. Additionally, to guide the verification process with the information obtained through monitoring process variations, expectation-maximization method is employed. The algorithm is evaluated on a prototype multi-step ADC converter with embedded dedicated sensors fabricated in standard single poly, six metal 0.09-樨 CMOS

Dynamic Pressure Sensing for the Flight Test Data System

This thesis describes the design, assembly, and test of the FTDS-K, a new device in the Boundary Layer Data System (BLDS) family of flight data acquisition systems. The FTDS-K provides high-frequency, high-gain data acquisition capability for up to two pressure sensors and an additional three low-frequency pressure sensors. Development of the FTDS-K was separated into a core module, specialized analog subsystem, and practical testing of the FTDS-K in a flow measurement mission. The core module combines an nRF52840-based microcontroller module, switching regulator, microSD card, real-time clock, temperature sensor, and trio of pressure sensors to provide the same capabilities as previous-generation BLDS-P devices. An expansion header is included in the core module to allow additional functionality to be added via daughter boards. An analog signal chain comprised of two-stage amplification and fourth-order active antialiasing filters was implemented as a daughter board to provide an AC-coupled end-to-end gain of 7,500 and a DC-coupled end-to-end gain of 50. This arrangement was tested in a wind tunnel to demonstrate that sensors with a full-scale range of 103 kPa can be used to reliably discriminate between laminar and turbulent flows based on pressure fluctuation differences on the order of tens of Pa. A combination of wind-off correction and band-filtering was used to reduce the effect of inherent and induced electrical noise, while two-sensor correlation was tested and shown to be effective at removing certain types of noise. Total power consumption for the FTDS-K in a representative mission is 208 mW, which translates to an operational endurance of 9 hours with 2 AAA LiFeS2 cells at -40°C

Advanced Algorithms for Satellite Communication Signal Processing

Dizertační práce je zaměřena na softwarově definované přijímače určené k úzkopásmové družicové komunikaci. Komunikační kanály družicových spojů zahrnujících komunikaci s hlubokým vesmírem jsou zatíženy vysokými úrovněmi šumu, typicky modelovaného AWGN, a silným Dopplerovým posuvem signálu způsobeným mimořádnou rychlostí pohybu objektu. Dizertační práce představuje možné postupy řešení výpočetně efektivní digitální downkonverze úzkopásmových signálů a systému odhadu kmitočtu nosné úzkopásmových signálů zatížených Dopplerovým posuvem v řádu násobků šířky pásma signálu. Popis navrhovaných algoritmů zahrnuje analytický postup jejich vývoje a tam, kde je to možné, i analytické hodnocení jejich chování. Algoritmy jsou modelovány v prostředí MATLAB Simulink a tyto modely jsou využity pro ověření vlastností simulacemi. Modely byly také využity k experimentálním testům na reálném signálu přijatém z družice PSAT v laboratoři experimentálních družic na ústavu radioelektroniky.The dissertation is focused on software defined receivers intended for narrowband satellite communication. The satellite communication channel including deep space communication suffers from a high level of noise, typically modeled by AWGN, and from a strong Doppler shift of a signal caused by the unprecedented speed of an object in motion. The dissertation shows possible approaches to the issues of computationally efficient digital downconversion of narrowband signals and the carrier frequency estimation of narrowband signals distorted by the Doppler shift in the order of multiples of the signal bandwidth. The description of the proposed algorithms includes an analytical approach of its development and, if possible, the analytical performance assessment. The algorithms are modeled in MATLAB Simulink and the models are used for validating the performance by the simulation. The models were also used for experimental tests on the real signal received from the PSAT satellite at the laboratory of experimental satellites at the department of radio electronics.