Ensuring data confidentiality via plausibly deniable encryption and secure deletion – a survey

Ensuring confidentiality of sensitive data is of paramount importance, since data leakage may not only endanger dataowners’ privacy, but also ruin reputation of businesses as well as violate various regulations like HIPPA andSarbanes-Oxley Act. To provide confidentiality guarantee, the data should be protected when they are preserved inthe personal computing devices (i.e.,confidentiality duringtheirlifetime); and also, they should be rendered irrecoverableafter they are removed from the devices (i.e.,confidentiality after their lifetime). Encryption and secure deletion are usedto ensure data confidentiality during and after their lifetime, respectively.This work aims to perform a thorough literature review on the techniques being used to protect confidentiality of thedata in personal computing devices, including both encryption and secure deletion. Especially for encryption, wemainly focus on the novel plausibly deniable encryption (PDE), which can ensure data confidentiality against both acoercive (i.e., the attacker can coerce the data owner for the decryption key) and a non-coercive attacker

FACTORS INFLUENCING CONSUMERS’ HARD DISK DRIVE PURCHASES IN BANGKOK, THAILAND

The objective of this study was to understand and identify the factors affecting customer’s purchase intention toward a new Hard Disk Drive (HDD) in Bangkok. The main factors that were studied were the demographic, marketing mix and consumer behavior factors (specifically attitudes toward technology and reference groups). This study employed quantitative research methodology by using a survey questionnaire to collect data from 385 respondents who had purchased or planned to purchase a HDD in Bangkok through either online or offline communication channels. The descriptive and inferential analyses for this study entailed frequency, percentage, mean, standard deviation, t-test, ANOVA and Linear Regression. The study found that the following four factors showed significant positive influences on customers’ purchase intention toward HDDs in Bangkok: (1.) product, (2.) place, (3.) attitudes toward technology, and (4.) references group. Conversely, other marketing mix and demographic factors had no influences on the respondents’ purchase intentions

Selected Papers from the First International Symposium on Future ICT (Future-ICT 2019) in Conjunction with 4th International Symposium on Mobile Internet Security (MobiSec 2019)

The International Symposium on Future ICT (Future-ICT 2019) in conjunction with the 4th International Symposium on Mobile Internet Security (MobiSec 2019) was held on 17–19 October 2019 in Taichung, Taiwan. The symposium provided academic and industry professionals an opportunity to discuss the latest issues and progress in advancing smart applications based on future ICT and its relative security. The symposium aimed to publish high-quality papers strictly related to the various theories and practical applications concerning advanced smart applications, future ICT, and related communications and networks. It was expected that the symposium and its publications would be a trigger for further related research and technology improvements in this field

Priority-Driven Differentiated Performance for NoSQL Database-As-a-Service

Designing data stores for native Cloud Computing services brings a number of challenges, especially if the Cloud Provider wants to offer database services capable of controlling the response time for specific customers. These requests may come from heterogeneous data-driven applications with conflicting responsiveness requirements. For instance, a batch processing workload does not require the same level of responsiveness as a time-sensitive one. Their coexistence may interfere with the responsiveness of the time-sensitive workload, such as online video gaming, virtual reality, and cloud-based machine learning. This paper presents a modification to the popular MongoDB NoSQL database to enable differentiated per-user/request performance on a priority basis by leveraging CPU scheduling and synchronization mechanisms available within the Operating System. This is achieved with minimally invasive changes to the source code and without affecting the performance and behavior of the database when the new feature is not in use. The proposed extension has been integrated with the access-control model of MongoDB for secure and controlled access to the new capability. Extensive experimentation with realistic workloads demonstrates how the proposed solution is able to reduce the response times for high-priority users/requests, with respect to lower-priority ones, in scenarios with mixed-priority clients accessing the data store

Applications for Packetized Memory Interfaces

The performance of the memory subsystem has a large impact on the performance of modern computer systems. Many important applications are memory bound and others are expected to become memory bound in the future. The importance of memory performance makes it imperative to understand and optimize the interactions between applications and the system architecture. Prototyping and exploring various configurations of memory systems can give important insights, but current memory interfaces are limited in the amount of flexibility they provide. This inflexibility stems primarily from the fixed timing of the memory interface. Packetized memory interfaces abstract away the underlying timing characteristics of the memory technology and allow greater flexibility in the design of memory hierarchies. This work uses packetized interfaces to explore memory hierarchy designs and prototype a novel network attached memory. Since current processors do not support packetized memory interfaces, a coherent processor bus is used as a memory interface for the DiskRAM project. The Hybrid Memory Cube (HMC) packetized memory interface is also presented and used to prototype network-attached memory. The HMC interface is discussed in detail, along with the design and implementation of a Universal Verification Component (UVC) environment. The convergence of network and memory interfaces is also predicted

Building Reliable Software for Persistent Memory

Persistent memory (PMEM) technologies preserve data across power cycles and provide performance comparable to DRAM. In emerging computer systems, PMEM will operate on the main memory bus, becoming byte-addressable and cache-coherent. One key feature enabled by persistent memory is to allow software directly accessing durable data using the CPU’s load/store instructions, even from the user-space.However, building reliable software for persistent memory faces new challenges from two aspects: crash consistency and fault tolerance. Maintaining crash consistency requires the ability to recover data integrity in the event of system crashes. Using load/store instructions to access durable data introduces a new programming paradigm, that is prone to new types of programming errors. Fault tolerance involves detecting and recovering from persistent memory errors, including memory media errors and scribbles from software bugs. With direct access, file systems and user-space applications have to explicitly manage these errors, instead of relying on convenient functions from lower I/O stacks.We identify unique challenges in improving reliability for PMEM-based software and propose solutions. The thesis first introduces NOVA-Fortis, a fault-tolerant PMEM file system incorporating replication, checksums, and parity for protecting the file system’s metadata and the user’s file data. NOVA-Fortis is both fast and resilient in the face of corruption due to media errors and software bugs.NOVA-Fortis only protects file data via the read() and write() system calls. When an application memory-maps a PMEM file, NOVA-Fortis has to disable file data protection because mmap() leaves the file system unaware of updates made to the file. For protecting memory-mapped PMEM data, we present Pangolin, a fault-tolerant persistent object library to protect an application’s objects from persistent memory errors.Writing programs to ensure crash consistency in PMEM remains challenging. Recovery bugs arise as a new type of programming error, preventing a post-crash PMEM file from recovering to a consistent state. Thus, we design two debugging tools for persistent memory programming: PmemConjurer and PmemSanitizer. PmemConjurer is a static analyzer using symbolic execution to find recovery bugs without running a compiled program. PmemSanitizer contains compiler instrumentation and run-time recovery bug analysis, compensating PmemConjurer with multi-threading support and store reordering tests

Evaluation of the colossal electroresistance (CER) effect and its application in the non-volatile Resistive Random Access Memory (RRAM)

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2009.Cataloged from PDF version of thesis.Includes bibliographical references (p. 79-81).Flash memory, the current leading technology for non-volatile memory (NVM), is projected by many to run obsolete in the face of future miniaturization trend in the semiconductor devices due to some of its technical limitations. Several different technologies have been developed in attempt for replacing Flash memory as the most dominant NVM technology; none of which seems to indicate significant success at the moment. Among these technologies is RRAM (Resistive Random Access Memory), a novel type of memory technology which has only recently emerged to join the race. The underlying principle of an RRAM device is based on the colossal electroresistance (CER) effect, i.e. the resistance switching behavior upon application of voltage of varying polarity and/or magnitude. This thesis aims to investigate the CER effect and how it can be designed to be a non-volatile memory as well as other novel application, e.g. memristor. The various technical aspects pertaining to this phenomenon, including the materials and the physical basis, are explored and analyzed. As a complementary to that, the market potential of the RRAM technology is also assessed. This includes the market study of memory industry, the current intellectual property (IP) landscape and some of the relevant business strategies. The production strategy (i.e. the production cost, initial investment, and pricing strategy) is then derived from the technical and market analysis evaluated earlier and with using some reasonable assumptions.by Aulia Tegar Wicaksono.M.Eng