99,713 research outputs found
Generic closed loop controller for power regulation in dual active bridge DC-DC converter with current stress minimization
This paper presents a comprehensive and generalized analysis of the bidirectional dual active bridge (DAB) DC/DC converter using triple phase shift (TPS) control to enable closed loop power regulation while minimizing current stress. The key new achievements are: a generic analysis in terms of possible conversion ratios/converter voltage gains (i.e. Buck/Boost/Unity), per unit based equations regardless of DAB ratings, and a new simple closed loop controller implementable in real time to meet desired power transfer regulation at minimum current stress. Per unit based analytical expressions are derived for converter AC RMS current as well as power transferred. An offline particle swarm optimization (PSO) method is used to obtain an extensive set of TPS ratios for minimizing the RMS current in the entire bidirectional power range of - 1 to 1 per unit. The extensive set of results achieved from PSO presents a generic data pool which is carefully analyzed to derive simple useful relations. Such relations enabled a generic closed loop controller design that can be implemented in real time avoiding the extensive computational capacity that iterative optimization techniques require. A detailed Simulink DAB switching model is used to validate precision of the proposed closed loop controller under various operating conditions. An experimental prototype also substantiates the results achieved
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Noise shaping Asynchronous SAR ADC based time to digital converter
Time-to-digital converters (TDCs) are key elements for the digitization of timing information in modern mixed-signal circuits such as digital PLLs, DLLs, ADCs, and on-chip jitter-monitoring circuits. Especially, high-resolution TDCs are increasingly employed in on-chip timing tests, such as jitter and clock skew measurements, as advanced fabrication technologies allow fine on-chip time resolutions. Its main purpose is to quantize the time interval of a pulse signal or the time interval between the rising edges of two clock signals. Similarly to ADCs, the performance of TDCs are also primarily characterized by Resolution, Sampling Rate, FOM, SNDR, Dynamic Range and DNL/INL. This work proposes and demonstrates 2nd order noise shaping Asynchronous SAR ADC based TDC architecture with highest resolution of 0.25 ps among current state of art designs with respect to post-layout simulation results. This circuit is a combination of low power/High Resolution 2nd Order Noise Shaped Asynchronous SAR ADC backend with simple Time to Amplitude converter (TAC) front-end and is implemented in 40nm CMOS technology. Additionally, special emphasis is given on the discussion on various current state of art TDC architectures.Electrical and Computer Engineerin
Energy Efficient Relay-Assisted Cellular Network Model using Base Station Switching
Cellular network planning strategies have tended to focus on peak traffic scenarios rather than energy efficiency. By exploiting the dynamic nature of traffic load profiles, the prospect for greener communications in cellular access networks is evolving. For example, powering down base stations (BS) and applying cell zooming can significantly reduce energy consumption, with the overriding design priority still being to uphold a minimum quality of service (QoS). Switching off cells completely can lead to both coverage holes and performance degradation in terms of increased outage probability, greater transmit power dissipation in the up and downlinks, and complex interference management, even at low traffic loads. In this paper, a cellular network model is presented where certain BS rather than being turned off, are switched to low-powered relay stations (RS) during zero-to-medium traffic periods. Neighbouring BS still retain all the baseband signal processing and transmit signals to corresponding RS via backhaul connections, under the assumption that the RS covers the whole cell. Experimental results demonstrate the efficacy of this new BS-RS Switching technique from both an energy saving and QoS perspective, in the up and downlinks
Trajectory Reconstruction Techniques for Evaluation of ATC Systems
This paper is focused on trajectory reconstruction techniques for evaluating ATC systems, using real data of recorded opportunity traffic. We analyze different alternatives for this problem, from traditional interpolation approaches based on curve fitting to our proposed schemes based on modeling regular motion patterns with optimal smoothers. The extraction of trajectory features such as motion type (or mode of flight), maneuvers profile, geometric parameters, etc., allows a more accurate computation of the curve and the detailed evaluation of the data processors used in the ATC centre. Different alternatives will be compared with some performance results obtained with simulated and real data sets
A comprehensive analysis of SVPWM for a Five-phase VSI based on SiC devices applied to motor drives
© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.This paper presents a comprehensive analysis of SVPWM for a five-phase VSI based on SiC devices applied to motor drives. The modulation techniques analyzed use medium and large vectors to reach the reference vector. The 2L SVPWM uses two large space vectors, and the generated output signal contain low frequency harmonics. 2L+2M SVPWM uses two large and two medium space vectors. This technique provides good power loss distribution. 4L SVPWM works with the activation of four large space vectors. This modulation is able to generate low common-mode voltage. The performance and main features are analyzed using Matlab/Simulink and PLECS blockset software. Power losses, total harmonic distortion and common-mode voltage are compared and evaluated.Postprint (author's final draft
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The road to fully integrated DC-DC conversion via the switched-capacitor approach
This paper provides a perspective on progress toward realization of efficient, fully integrated dc-dc conversion and regulation functionality in CMOS platforms. In providing a comparative assessment between the inductor-based and switched-capacitor approaches, the presentation reviews the salient features in effectiveness in utilization of switch technology and in use and implementation of passives. The analytical conclusions point toward the strong advantages of the switched-capacitor (SC) approach with respect to both switch utilization and much higher energy densities of capacitors versus inductors. The analysis is substantiated with a review of recently developed and published integrated dc-dc converters of both the inductor-based and SC types. © 2012 IEEE
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Boundary-mode operation of the boost converter for thermoelectric generator maximum power tracking
This article has been made available through the Brunel Open Access Publishing Fund.Performance-favourable and noteworthy characteristics of the Boost converter are reported, when the latter operates in Maximum Power Tracking (MPT) mode, while fed from a fixed internal resistance power source specifically a Thermo Electric Generator (TEG). It is found that if the converter is controlled with Pulse Frequency Modulation (PFM), for a specific value of inductance, the inductor current inherently remains on the boundary of continuity for the whole control range, that is under all conditions, resulting in reduced switching losses. Furthermore, MPT is possible without the sampling of any current but only with the sampling of the converter input and output voltages. The above theoretical findings have been verified by an experimental prototype
A comparative study of several control techniques applied to a boost converter
In this paper a comparison among three control strategies is presented, with application to a boost DC-DC converter. The control strategies are developed on the switched boost circuit model and validated on the nonlinear model by use of simulations. The classical PID, a 2dof-IMC (two degree of freedom internal model controller) and an alternative controller - MAC (uprocessor advanced control) are applied, tested and compared on the nonlinear system. Additional tests show the robustness of the controllers on the highly nonlinear circuit
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