Ka-band Ga-As FET noise receiver/device development

The development of technology for a 30 GHz low noise receiver utilizing GaAs FET devices exclusively is discussed. This program required single and dual-gate FET devices, low noise FET amplifiers, dual-gate FET mixers, and FET oscillators operating at Ka-band frequencies. A 0.25 micrometer gate FET device, developed with a minimum noise figure of 3.3 dB at 29 GHz and an associated gain of 7.4 dB, was used to fabricate a 3-stage amplifier with a minimum noise figure and associated gain of 4.4 dB and 17 dB, respectively. The 1-dB gain bandwidth of this amplifier extended from below 26.5 GHz to 30.5 GHz. A dual-gate mixer with a 2 dB conversion loss and a minimum noise figure of 10 dB at 29 GHz as well as a dielectric resonator stabilized FET oscillator at 25 GHz for the receiver L0. From these components, a hybrid microwave integrated circuit receiver was constructed which demonstrates a minimum single-side band noise figure of 4.6 dB at 29 GHz with a conversion gain of 17 dB. The output power at the 1-dB gain compression point was -5 dBm

A Biosensor-CMOS Platform and Integrated Readout Circuit in 0.18-μm CMOS Technology for Cancer Biomarker Detection

This paper presents a biosensor-CMOS platform for measuring the capacitive coupling of biorecognition elements. The biosensor is designed, fabricated, and tested for the detection and quantification of a protein that reveals the presence of early-stage cancer. For the first time, the spermidine/spermine N1 acetyltransferase (SSAT) enzyme has been screened and quantified on the surface of a capacitive sensor. The sensor surface is treated to immobilize antibodies, and the baseline capacitance of the biosensor is reduced by connecting an array of capacitors in series for fixed exposure area to the analyte. A large sensing area with small baseline capacitance is implemented to achieve a high sensitivity to SSAT enzyme concentrations. The sensed capacitance value is digitized by using a 12-bit highly digital successive-approximation capacitance-to-digital converter that is implemented in a 0.18 μm CMOS technology. The readout circuit operates in the near-subthreshold regime and provides power and area efficient operation. The capacitance range is 16.137 pF with a 4.5 fF absolute resolution, which adequately covers the concentrations of 10 mg/L, 5 mg/L, 2.5 mg/L, and 1.25 mg/L of the SSAT enzyme. The concentrations were selected as a pilot study, and the platform was shown to demonstrate high sensitivity for SSAT enzymes on the surface of the capacitive sensor. The tested prototype demonstrated 42.5 μS of measurement time and a total power consumption of 2.1 μW

Microstrip Superconducting Quantum Interference Devices for Quantum Information Science

Quantum-limited amplification in the microwave frequency range is of both practical and fundamental importance. The weak signals corresponding to single microwave photons require substantial amplification to resolve. When probing quantum excitations of the electromagnetic field, the substantial noise produced by standard amplifiers dominates the signal, therefore, several averages must be accumulated to achieve even a modest signal-to-noise ratio. Even worse, the back-action on the system due to amplifier noise can hasten the decay of the quantum state. In recent years, low-noise microwave-frequency amplification has been advancing rapidly and one field that would benefit greatly from this is circuit quantum electrodynamics (cQED). The development of circuit quantum electrodynamics---which implements techniques of quantum optics at microwave frequencies---has led to revolutionary progress in the field of quantum information science. cQED employs quantum bits (qubits) and superconducting microwave resonators in place of the atoms and cavities used in quantum optics permitting preparation and control of low energy photon states in macroscopic superconducting circuits at millikelvin temperatures. We have developed a microstrip superconducting quantum interference device (SQUID) amplifier (MSA) to provide the first stage of amplification for these systems. Employing sub-micron Josephson tunnel junctions for enhanced gain, these MSAs operate at microwave frequencies and are optimized to perform with near quantum-limited noise characteristics. Our MSA is utilized as the first stage of amplification to probe the dynamics of a SQUID oscillator. The SQUID oscillator is a flux-tunable microwave resonator formed by a capacitively shunted dc SQUID. Josephson plasma oscillations are induced by pulsed microwave excitations at the resonant frequency of the oscillator. Once pulsed, decaying plasma oscillations are observed in the time domain. By measuring with pulse amplitudes approaching the critical current of the SQUID, it is possible to probe the free evolution of a highly nonlinear oscillator

Two-stage S-Band LNA Development Using Non-Simultaneous Conjugate Match Technique

This paper presents the development of a two-stage low noise amplifier (LNA) operating at the S-band frequency that is implemented using the non-simultaneous conjugate match (NSCM) technique. The motivation of this work was to solve the issue of the gain of LNAs designed using the most commonly used technique, i.e. simultaneous conjugate match (SCM), which often produce an increase of other parameter values, i.e. noise figure and voltage standing wave ratio (VSWR). Prior to hardware implementation, the circuit simulation software Advanced Design System (ADS) was applied to design the two-stage S-band LNA and to determine the desired trade-off between its parameters. The proposed two-stage S-band LNA was deployed on an Arlon DiClad527 using a bipolar junction transistor (BJT), type BFP420. Meanwhile, to achieve impedances that match the two-stage S-band LNA circuit, microstrip lines were employed at the input port, the interstage, and the output port. Experimental characterization showed that the realized two-stage S-band LNA produced a gain of 22.77 dB and a noise figure of 3.58 dB at a frequency of 3 GHz. These results were 6.1 dB lower than the simulated gain and 0.76 dB higher than the simulated noise figure respectively

A study of microwave downcoverters operating in the K sub u band

A computer program for parametric amplifier design is developed with special emphasis on practical design considerations for microwave integrated circuit degenerate amplifiers. Precision measurement techniques are developed to obtain a more realistic varactor equivalent circuit. The existing theory of a parametric amplifier is modified to include the equivalent circuit, and microwave properties, such as loss characteristics and circuit discontinuities are investigated

RF system for mmWave massive MIMO

Due to rapid developments in communication technology, it is likely that 5G networks will be rolled out in 2019. To adapt to 5G, hardware will have to develop to meet the requirements of this new technology. The mmWave communication is one of the main elements of 5G technology. The mmWave frequency bandwidth is used to carry the data links and can achieve a higher transmission data rate than the current LTE system. There are few continuous frequency resources under 3GHz that can be allocated. As such, the International Telecommunication Union (ITU) and the 3GPP organization mutually agree that the mmWave is the most suitable option for exploring new frequency resources. However, the mmWave has the one key weakness: high path loss for short transmission range. To compensate for this negative effect, a massive MIMO system can be used to have spatial multiplexing gains and array an-tenna gains. This article seeks a method that can acknowledge the funda-mental concepts and requirements of the mmWave massive MIMO system, from both theoretical and practical perspectives. In order to find proof of the concepts, the practical limitations, and the guild of the real design, a prototype of the system has been built. The current industry standard when creating a prototype is to use PCB. We will develop our system proposals from the prototype. To do so we use the evaluation boards to test system level performances such as link budget and identifying the most suitable components etc. Then in the PCB design, we integrate the radio frequency of the mmWave system. This has the scalability to collaborate with massive MIMO system test-bed to observe the system level performance. Finally, to verify our methods, we carry out experiments on both component level and system level in order to identify the feasibility of the prototype system. The performance of each individual component is tested using an evaluation board. Separate tests are performed for both transmitting (Tx) and receiving (Rx) chains. Finally, over-air-tests are conducted at the sys-tem level to evaluate the performance of our design5G communication system is the next milestone that will soon approach our lives. The first specification of 5G is called Release 15 and the system struc-tures and requirements of it have been identified. Compared to the LTE system, it can deliver an even higher data rate and adapt more transmission situations in the future. 5G consists of five essential technologies, mmWave, massive MIMO, the advanced channel coding, scalable OFDM and self-contained slot structure. The first two technologies, the mmWave and massive MIMO, are indispensable in this thesis. As the fre-quency resources scarcely go below 3GHz, they are retrieving the mmWave spectrum to allocate more accessible bandwidth. Nevertheless, the mmWave has high free space path loss, and the signal will be harshly weakened before it reaches the receiver. The massive MIMO is an extension of the MIMO system with massive antenna elements in the antenna array This sound solution can contradict the high free space path loss, achieve high throughput and serve tens of users simultaneously. This thesis concentrates on building a radio frequency system PCB prototype based on mmWave and massive MIMO. Now, the existing hardware devices will not placate the 5G system necessi-ties. The new system structure must be developed, and the performance will be evaluated. Prototype is a realization method to transition from theory to practice which can help the engineers comprehend the theoretical and prac-tical perspectives. In electronic industry, PCB is the correct way of building the radio frequency prototype, in which the system schematic is construct-ed in a dense area with mass circuit distribution. All electronic components are surfaced and then mounted on it and connected by conductive wires through the various layers. A flawless PCB needs to be shaped with full operational functions before the final products. To do this, the perfor-mance will be evaluated when we are building the PCB prototype and im-provements will be analysed, and additional developments will be encom-passed in the future version of PCB. In this thesis, the PCB performance is evaluated individually for different transmission chains, and then the over air test is assessed

Circuits and Systems for On-Chip RF Chemical Sensors and RF FDD Duplexers

Integrating RF bio-chemical sensors and RF duplexers helps to reduce cost and area in the current applications. Furthermore, new applications can exist based on the large scale integration of these crucial blocks. This dissertation addresses the integration of RF bio-chemical sensors and RF duplexers by proposing these initiatives. A low power integrated LC-oscillator-based broadband dielectric spectroscopy (BDS) system is presented. The real relative permittivity ε’r is measured as a shift in the oscillator frequency using an on-chip frequency-to-digital converter (FDC). The imaginary relative permittivity ε”r increases the losses of the oscillator tank which mandates a higher dc biasing current to preserve the same oscillation amplitude. An amplitude-locked loop (ALL) is used to fix the amplitude and linearize the relation between the oscillator bias current and ε”r. The proposed BDS system employs a sensing oscillator and a reference oscillator where correlated double sampling (CDS) is used to mitigate the impact of flicker noise, temperature variations and frequency drifts. A prototype is implemented in 0.18 µm CMOS process with total chip area of 6.24 mm^2 to operate in 1-6 GHz range using three dual bands LC oscillators. The achieved standard deviation in the air is 2.1 ppm for frequency reading and 110 ppm for current reading. A tunable integrated electrical balanced duplexer (EBD) is presented as a compact alternative to multiple bulky SAW and BAW duplexers in 3G/4G cellular transceivers. A balancing network creates a replica of the transmitter signal for cancellation at the input of a single-ended low noise amplifier (LNA) to isolate the receive path from the transmitter. The proposed passive EBD is based on a cross-connected transformer topology without the need of any extra balun at the antenna side. The duplexer achieves around 50 dB TX-RX isolation within 1.6-2.2 GHz range up to 22 dBm. The cascaded noise figure of the duplexer and LNA is 6.5 dB, and TX insertion loss (TXIL) of the duplexer is about 3.2 dB. The duplexer and LNA are implemented in 0.18 µm CMOS process and occupy an active area of 0.35 mm^2