Smart Sensor Networks For Sensor-Neural Interface

One in every fifty Americans suffers from paralysis, and approximately 23% of paralysis cases are caused by spinal cord injury. To help the spinal cord injured gain functionality of their paralyzed or lost body parts, a sensor-neural-actuator system is commonly used. The system includes: 1) sensor nodes, 2) a central control unit, 3) the neural-computer interface and 4) actuators. This thesis focuses on a sensor-neural interface and presents the research related to circuits for the sensor-neural interface. In Chapter 2, three sensor designs are discussed, including a compressive sampling image sensor, an optical force sensor and a passive scattering force sensor. Chapter 3 discusses the design of the analog front-end circuit for the wireless sensor network system. A low-noise low-power analog front-end circuit in 0.5μm CMOS technology, a 12-bit 1MS/s successive approximation register (SAR) analog-to-digital converter (ADC) in 0.18μm CMOS process and a 6-bit asynchronous level-crossing ADC realized in 0.18μm CMOS process are presented. Chapter 4 shows the design of a low-power impulse-radio ultra-wide-band (IR-UWB) transceiver (TRx) that operates at a data rate of up to 10Mbps, with a power consumption of 4.9pJ/bit transmitted for the transmitter and 1.12nJ/bit received for the receiver. In Chapter 5, a wireless fully event-driven electrogoniometer is presented. The electrogoniometer is implemented using a pair of ultra-wide band (UWB) wireless smart sensor nodes interfacing with low power 3-axis accelerometers. The two smart sensor nodes are configured into a master node and a slave node, respectively. An experimental scenario data analysis shows higher than 90% reduction of the total data throughput using the proposed fully event-driven electrogoniometer to measure joint angle movements when compared with a synchronous Nyquist-rate sampling system. The main contribution of this thesis includes: 1) the sensor designs that emphasize power efficiency and data throughput efficiency; 2) the fully event-driven wireless sensor network system design that minimizes data throughput and optimizes power consumption

Low-Power Energy Efficient Circuit Techniques for Small IoT Systems

Although the improvement in circuit speed has been limited in recent years, there has been increased focus on the internet of things (IoT) as technology scaling has decreased circuit size, power usage and cost. This trend has led to the development of many small sensor systems with affordable costs and diverse functions, offering people convenient connection with and control over their surroundings. This dissertation discusses the major challenges and their solutions in realizing small IoT systems, focusing on non-digital blocks, such as power converters and analog sensing blocks, which have difficulty in following the traditional scaling trends of digital circuits. To accommodate the limited energy storage and harvesting capacity of small IoT systems, this dissertation presents an energy harvester and voltage regulators with low quiescent power and good efficiency in ultra-low power ranges. Switched-capacitor-based converters with wide-range energy-efficient voltage-controlled oscillators assisted by power-efficient self-oscillating voltage doublers and new cascaded converter topologies for more conversion ratio configurability achieve efficient power conversion down to several nanowatts. To further improve the power efficiency of these systems, analog circuits essential to most wireless IoT systems are also discussed and improved. A capacitance-to-digital sensor interface and a clocked comparator design are improved by their digital-like implementation and operation in phase and frequency domain. Thanks to the removal of large passive elements and complex analog blocks, both designs achieve excellent area reduction while maintaining state-of-art energy efficiencies. Finally, a technique for removing dynamic voltage and temperature variations is presented as smaller circuits in advanced technologies are more vulnerable to these variations. A 2-D simultaneous feedback control using an on-chip oven control locks the supply voltage and temperature of a small on-chip domain and protects circuits in this locked domain from external voltage and temperature changes, demonstrating 0.0066 V/V and 0.013 °C/°C sensitivities to external changes. Simple digital implementation of the sensors and most parts of the control loops allows robust operation within wide voltage and temperature ranges.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/138743/1/wanyeong_1.pd

Low-Noise Energy-Efficient Sensor Interface Circuits

Today, the Internet of Things (IoT) refers to a concept of connecting any devices on network where environmental data around us is collected by sensors and shared across platforms. The IoT devices often have small form factors and limited battery capacity; they call for low-power, low-noise sensor interface circuits to achieve high resolution and long battery life. This dissertation focuses on CMOS sensor interface circuit techniques for a MEMS capacitive pressure sensor, thermopile array, and capacitive microphone. Ambient pressure is measured in the form of capacitance. This work propose two capacitance-to-digital converters (CDC): a dual-slope CDC employs an energy efficient charge subtraction and dual comparator scheme; an incremental zoom-in CDC largely reduces oversampling ratio by using 9b zoom-in SAR, significantly improving conversion energy. An infrared gesture recognition system-on-chip is then proposed. A hand emits infrared radiation, and it forms an image on a thermopile array. The signal is amplified by a low-noise instrumentation chopper amplifier, filtered by a low-power 30Hz LPF to remove out-band noise including the chopper frequency and its harmonics, and digitized by an ADC. Finally, a motion history image based DSP analyzes the waveform to detect specific hand gestures. Lastly, a microphone preamplifier represents one key challenge in enabling voice interfaces, which are expected to play a dominant role in future IoT devices. A newly proposed switched-bias preamplifier uses switched-MOSFET to reduce 1/f noise inherently.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137061/1/chaseoh_1.pd

Energy Harvesting for Self-Powered Wireless Sensors

A wireless sensor system is proposed for a targeted deployment in civil infrastructures (namely bridges) to help mitigate the growing problem of deterioration of civil infrastructures. The sensor motes are self-powered via a novel magnetic shape memory alloy (MSMA) energy harvesting material and a low-frequency, low-power rectifier multiplier (RM). Experimental characterizations of the MSMA device and the RM are presented. A study on practical implementation of a strain gauge sensor and its application in the proposed sensor system are undertaken and a low-power successive approximation register analog-to-digital converter (SAR ADC) is presented. The SAR ADC was fabricated and laboratory characterizations show the proposed low-voltage topology is a viable candidate for deployment in the proposed sensor system. Additionally, a wireless transmitter is proposed to transmit the SAR ADC output using on-off keying (OOK) modulation with an impulse radio ultra-wideband (IR-UWB) transmitter (TX). The RM and SAR ADC were fabricated in ON 0.5 micrometer CMOS process. An alternative transmitter architecture is also presented for use in the 3-10GHz UWB band. Unlike the IR-UWB TX described for the proposed wireless sensor system, the presented transmitter is designed to transfer large amounts of information with little concern for power consumption. This second method of data transmission divides the 3-10GHz spectrum into 528MHz sub-bands and "hops" between these sub-bands during data transmission. The data is sent over these multiple channels for short distances (?3-10m) at data rates over a few hundred million bits per second (Mbps). An UWB TX is presented for implementation in mode-I (3.1-4.6GHz) UWB which utilizes multi-band orthogonal frequency division multiplexing (MB-OFDM) to encode the information. The TX was designed and fabricated using UMC 0.13 micrometer CMOS technology. Measurement results and theoretical system level budgeting are presented for the proposed UWB TX

GaN-Based Micro-LED Visible Light Communication: Line-of-Sight VLC with Active Tracking and None-Line-of-Sight VLC Demonstration

abstract: Visible light communication (VLC) is the promise of a high data rate wireless network for both indoor and outdoor uses. It competes with 5G radio frequency (RF) system as well. Even though the breakthrough of Gallium Nitride (GaN) based micro-light-emitting-diodes (micro-LEDs) enhances the -3dB modulation bandwidth dramatically from tens of MHz to hundreds of MHz, the optical power onto a fast photo receiver drops exponentially. It determines the signal to noise ratio (SNR) of VLC. For full implementation of the useful high data-rate VLC link enabled by a GaN-based micro-LED, it needs focusing optics and a tracking system. In this dissertation, we demonstrate a novel active on-chip monitoring system for VLC using a GaN-based micro-LED and none-return-to-zero on-off keying (NRZ-OOK) modulation scheme. By this innovative technique without manual focusing, the field of view (FOV) was enlarged to 120° and data rates up to 600 Mbps at a bit error rate (BER) of 2.1×10⁻⁴ were achieved. This work demonstrates the establishment of a VLC physical link. It shows improved communication quality by orders, making it optimized for real communications. This dissertation also gives an experimental demonstration of non-line-of-sight (NLOS) visible light communication (VLC) using a single 80 μm gallium nitride (GaN) based micro-light-emitting diode (micro-LED). IEEE 802.11ac modulation scheme with 80 MHz bandwidth, as an entry level of the fifth generation of Wi-Fi, was employed to use the micro-LED bandwidth efficiently. These practical techniques were successfully utilized to achieve a demonstration of line-of-sight (LOS) VLC at a speed of 433 Mbps, and a bit error rate (BER) of 10⁻⁵ with a free space transmit distance 3.6 m. Besides this, we demonstrated directed NLOS VLC links based on mirror reflections with a data rate of 433 Mbps and a BER of 10⁻⁴. For non-directed NLOS VLC using a print paper as the reflective material, 195 Mbps data rate and a BER of 10⁻⁵ was achieved.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

Integrated Electronics for Wireless Imaging Microsystems with CMUT Arrays

Integration of transducer arrays with interface electronics in the form of single-chip CMUT-on-CMOS has emerged into the field of medical ultrasound imaging and is transforming this field. It has already been used in several commercial products such as handheld full-body imagers and it is being implemented by commercial and academic groups for Intravascular Ultrasound and Intracardiac Echocardiography. However, large attenuation of ultrasonic waves transmitted through the skull has prevented ultrasound imaging of the brain. This research is a prime step toward implantable wireless microsystems that use ultrasound to image the brain by bypassing the skull. These microsystems offer autonomous scanning (beam steering and focusing) of the brain and transferring data out of the brain for further processing and image reconstruction. The objective of the presented research is to develop building blocks of an integrated electronics architecture for CMUT based wireless ultrasound imaging systems while providing a fundamental study on interfacing CMUT arrays with their associated integrated electronics in terms of electrical power transfer and acoustic reflection which would potentially lead to more efficient and high-performance systems. A fully wireless architecture for ultrasound imaging is demonstrated for the first time. An on-chip programmable transmit (TX) beamformer enables phased array focusing and steering of ultrasound waves in the transmit mode while its on-chip bandpass noise shaping digitizer followed by an ultra-wideband (UWB) uplink transmitter minimizes the effect of path loss on the transmitted image data out of the brain. A single-chip application-specific integrated circuit (ASIC) is de- signed to realize the wireless architecture and interface with array elements, each of which includes a transceiver (TRX) front-end with a high-voltage (HV) pulser, a high-voltage T/R switch, and a low-noise amplifier (LNA). Novel design techniques are implemented in the system to enhance the performance of its building blocks. Apart from imaging capability, the implantable wireless microsystems can include a pressure sensing readout to measure intracranial pressure. To do so, a power-efficient readout for pressure sensing is presented. It uses pseudo-pseudo differential readout topology to cut down the static power consumption of the sensor for further power savings in wireless microsystems. In addition, the effect of matching and electrical termination on CMUT array elements is explored leading to new interface structures to improve bandwidth and sensitivity of CMUT arrays in different operation regions. Comprehensive analysis, modeling, and simulation methodologies are presented for further investigation.Ph.D

소형동물의 뇌신경 자극을 위한 완전 이식형 신경자극기

학위논문(박사)--서울대학교 대학원 :공과대학 전기·정보공학부,2020. 2. 김성준.In this study, a fully implantable neural stimulator that is designed to stimulate the brain in the small animal is described. Electrical stimulation of the small animal is applicable to pre-clinical study, and behavior study for neuroscience research, etc. Especially, behavior study of the freely moving animal is useful to observe the modulation of sensory and motor functions by the stimulation. It involves conditioning animal's movement response through directional neural stimulation on the region of interest. The main technique that enables such applications is the development of an implantable neural stimulator. Implantable neural stimulator is used to modulate the behavior of the animal, while it ensures the free movement of the animals. Therefore, stable operation in vivo and device size are important issues in the design of implantable neural stimulators. Conventional neural stimulators for brain stimulation of small animal are comprised of electrodes implanted in the brain and a pulse generation circuit mounted on the back of the animal. The electrical stimulation generated from the circuit is conveyed to the target region by the electrodes wire-connected with the circuit. The devices are powered by a large battery, and controlled by a microcontroller unit. While it represents a simple approach, it is subject to various potential risks including short operation time, infection at the wound, mechanical failure of the device, and animals being hindered to move naturally, etc. A neural stimulator that is miniaturized, fully implantable, low-powered, and capable of wireless communication is required. In this dissertation, a fully implantable stimulator with remote controllability, compact size, and minimal power consumption is suggested for freely moving animal application. The stimulator consists of modular units of surface-type and depth-type arrays for accessing target brain area, package for accommodating the stimulating electronics all of which are assembled after independent fabrication and implantation using customized flat cables and connectors. The electronics in the package contains ZigBee telemetry for low-power wireless communication, inductive link for recharging lithium battery, and an ASIC that generates biphasic pulse for neural stimulation. A dual-mode power-saving scheme with a duty cycling was applied to minimize the power consumption. All modules were packaged using liquid crystal polymer (LCP) to avoid any chemical reaction after implantation. To evaluate the fabricated stimulator, wireless operation test was conducted. Signal-to-Noise Ratio (SNR) of the ZigBee telemetry were measured, and its communication range and data streaming capacity were tested. The amount of power delivered during the charging session depending on the coil distance was measured. After the evaluation of the device functionality, the stimulator was implanted into rats to train the animals to turn to the left (or right) following a directional cue applied to the barrel cortex. Functionality of the device was also demonstrated in a three-dimensional maze structure, by guiding the rats to navigate better in the maze. Finally, several aspects of the fabricated device were discussed further.본 연구에서는 소형 동물의 두뇌를 자극하기 위한 완전 이식형 신경자극기가 개발되었다. 소형 동물의 전기자극은 전임상 연구, 신경과학 연구를 위한 행동연구 등에 활용된다. 특히, 자유롭게 움직이는 동물을 대상으로 한 행동 연구는 자극에 의한 감각 및 운동 기능의 조절을 관찰하는 데 유용하게 활용된다. 행동 연구는 두뇌의 특정 관심 영역을 직접적으로 자극하여 동물의 행동반응을 조건화하는 방식으로 수행된다. 이러한 적용을 가능케 하는 핵심기술은 이식형 신경자극기의 개발이다. 이식형 신경자극기는 동물의 움직임을 방해하지 않으면서도 그 행동을 조절하기 위해 사용된다. 따라서 동물 내에서의 안정적인 동작과 장치의 크기가 이식형 신경자극기를 설계함에 있어 중요한 문제이다. 기존의 신경자극기는 두뇌에 이식되는 전극 부분과, 동물의 등 부분에 위치한 회로부분으로 구성된다. 회로에서 생산된 전기자극은 회로와 전선으로 연결된 전극을 통해 목표 지점으로 전달된다. 장치는 배터리에 의해 구동되며, 내장된 마이크로 컨트롤러에 의해 제어된다. 이는 쉽고 간단한 접근방식이지만, 짧은 동작시간, 이식부위의 감염이나 장치의 기계적 결함, 그리고 동물의 자연스러운 움직임 방해 등 여러 문제점을 야기할 수 있다. 이러한 문제의 개선을 위해 무선통신이 가능하고, 저전력, 소형화된 완전 이식형 신경자극기의 설계가 필요하다. 본 연구에서는 자유롭게 움직이는 동물에 적용하기 위하여 원격 제어가 가능하며, 크기가 작고, 소모전력이 최소화된 완전이식형 자극기를 제시한다. 설계된 신경자극기는 목표로 하는 두뇌 영역에 접근할 수 있는 표면형 전극과 탐침형 전극, 그리고 자극 펄스 생성 회로를 포함하는 패키지 등의 모듈들로 구성되며, 각각의 모듈은 독립적으로 제작되어 동물에 이식된 뒤 케이블과 커넥터로 연결된다. 패키지 내부의 회로는 저전력 무선통신을 위한 지그비 트랜시버, 리튬 배터리의 재충전을 위한 인덕티브 링크, 그리고 신경자극을 위한 이상성 자극파형을 생성하는 ASIC으로 구성된다. 전력 절감을 위해 두 개의 모드를 통해 사용률을 조절하는 방식이 장치에 적용된다. 모든 모듈들은 이식 후의 생물학적, 화학적 안정성을 위해 액정 폴리머로 패키징되었다. 제작된 신경자극기를 평가하기 위해 무선 동작 테스트가 수행되었다. 지그비 통신의 신호 대 잡음비가 측정되었으며, 해당 통신의 동작거리 및 데이터 스트리밍 성능이 검사되었고, 장치의 충전이 수행될 때 코일간의 거리에 따라 전송되는 전력의 크기가 측정되었다. 장치의 평가 이후, 신경자극기는 쥐에 이식되었으며, 해당 동물은 이식된 장치를 이용해 방향 신호에 따라 좌우로 이동하도록 훈련되었다. 또한, 3차원 미로 구조에서 쥐의 이동방향을 유도하는 실험을 통하여 장치의 기능성을 추가적으로 검증하였다. 마지막으로, 제작된 장치의 특징이 여러 측면에서 심층적으로 논의되었다.Chapter 1 : Introduction 1 1.1. Neural Interface 2 1.1.1. Concept 2 1.1.2. Major Approaches 3 1.2. Neural Stimulator for Animal Brain Stimulation 5 1.2.1. Concept 5 1.2.2. Neural Stimulator for Freely Moving Small Animal 7 1.3. Suggested Approaches 8 1.3.1. Wireless Communication 8 1.3.2. Power Management 9 1.3.2.1. Wireless Power Transmission 10 1.3.2.2. Energy Harvesting 11 1.3.3. Full implantation 14 1.3.3.1. Polymer Packaging 14 1.3.3.2. Modular Configuration 16 1.4. Objectives of This Dissertation 16 Chapter 2 : Methods 18 2.1. Overview 19 2.1.1. Circuit Description 20 2.1.1.1. Pulse Generator ASIC 21 2.1.1.2. ZigBee Transceiver 23 2.1.1.3. Inductive Link 24 2.1.1.4. Energy Harvester 25 2.1.1.5. Surrounding Circuitries 26 2.1.2. Software Description 27 2.2. Antenna Design 29 2.2.1. RF Antenna 30 2.2.1.1. Design of Monopole Antenna 31 2.2.1.2. FEM Simulation 31 2.2.2. Inductive Link 36 2.2.2.1. Design of Coil Antenna 36 2.2.2.2. FEM Simulation 38 2.3. Device Fabrication 41 2.3.1. Circuit Assembly 41 2.3.2. Packaging 42 2.3.3. Electrode, Feedthrough, Cable, and Connector 43 2.4. Evaluations 45 2.4.1. Wireless Operation Test 46 2.4.1.1. Signal-to-Noise Ratio (SNR) Measurement 46 2.4.1.2. Communication Range Test 47 2.4.1.3. Device Operation Monitoring Test 48 2.4.2. Wireless Power Transmission 49 2.4.3. Electrochemical Measurements In Vitro 50 2.4.4. Animal Testing In Vivo 52 Chapter 3 : Results 57 3.1. Fabricated System 58 3.2. Wireless Operation Test 59 3.2.1. Signal-to-Noise Ratio Measurement 59 3.2.2. Communication Range Test 61 3.2.3. Device Operation Monitoring Test 62 3.3. Wireless Power Transmission 64 3.4. Electrochemical Measurements In Vitro 65 3.5. Animal Testing In Vivo 67 Chapter 4 : Discussion 73 4.1. Comparison with Conventional Devices 74 4.2. Safety of Device Operation 76 4.2.1. Safe Electrical Stimulation 76 4.2.2. Safe Wireless Power Transmission 80 4.3. Potential Applications 84 4.4. Opportunities for Further Improvements 86 4.4.1. Weight and Size 86 4.4.2. Long-Term Reliability 93 Chapter 5 : Conclusion 96 Reference 98 Appendix - Liquid Crystal Polymer (LCP) -Based Spinal Cord Stimulator 107 국문 초록 138 감사의 글 140Docto

Interface Circuits for Microsensor Integrated Systems

ca. 200 words; this text will present the book in all promotional forms (e.g. flyers). Please describe the book in straightforward and consumer-friendly terms. [Recent advances in sensing technologies, especially those for Microsensor Integrated Systems, have led to several new commercial applications. Among these, low voltage and low power circuit architectures have gained growing attention, being suitable for portable long battery life devices. The aim is to improve the performances of actual interface circuits and systems, both in terms of voltage mode and current mode, in order to overcome the potential problems due to technology scaling and different technology integrations. Related problems, especially those concerning parasitics, lead to a severe interface design attention, especially concerning the analog front-end and novel and smart architecture must be explored and tested, both at simulation and prototype level. Moreover, the growing demand for autonomous systems gets even harder the interface design due to the need of energy-aware cost-effective circuit interfaces integrating, where possible, energy harvesting solutions. The objective of this Special Issue is to explore the potential solutions to overcome actual limitations in sensor interface circuits and systems, especially those for low voltage and low power Microsensor Integrated Systems. The present Special Issue aims to present and highlight the advances and the latest novel and emergent results on this topic, showing best practices, implementations and applications. The Guest Editors invite to submit original research contributions dealing with sensor interfacing related to this specific topic. Additionally, application oriented and review papers are encouraged.

Integrated reference circuits for low-power capacitive sensor interfaces

This thesis consists of nine publications and an overview of the research topic, which also summarizes the work. The research described in this thesis concentrates on the design of low-power sensor interfaces for capacitive 3-axis micro-accelerometers. The primary goal throughout the thesis is to optimize power dissipation. Because the author made the main contribution to the design of the reference and power management circuits required, the overview part is dominated by the following research topics: current, voltage, and temperature references, frequency references, and voltage regulators. After an introduction to capacitive micro-accelerometers, the work describes the typical integrated readout electronics of a capacitive sensor on the functional level. The readout electronics can be divided into four different functional parts, namely the sensor readout itself, signal post-processing, references, and power management. Before the focus is shifted to the references and further to power management, different ways to realize the sensor readout are briefly discussed. Both current and voltage references are required in most analog and mixed-signal systems. A bandgap voltage reference, which inherently uses at least one current reference, is practical for the generation of an accurate reference voltage. Very similar circuit techniques can be exploited when implementing a temperature reference, the need for which in the sensor readout may be justified by the temperature compensation, for example. The work introduces non-linear frequency references, namely ring and relaxation oscillators, which are very suitable for the generation of the relatively low-frequency clock signals typically needed in the sensor interfaces. Such oscillators suffer from poor jitter and phase noise performance, the quantities of which also deserve discussion in this thesis. Finally, the regulation of the supply voltage using linear regulators is considered. In addition to extending the battery life by providing a low quiescent current, the regulator must be able to supply very low load currents and operate without off-chip capacitors