759 research outputs found

    2023- The Twenty-seventh Annual Symposium of Student Scholars

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    The full program book from the Twenty-seventh Annual Symposium of Student Scholars, held on April 18-21, 2023. Includes abstracts from the presentations and posters.https://digitalcommons.kennesaw.edu/sssprograms/1027/thumbnail.jp

    Imaging Probe for Charged Particle Detection

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    Single Photon Avalanche Diodes (SPADs) are semiconductor devices that detect individual photons. However, they can also experience dark count rate (DCR), generating avalanche current even when no photons are present, which limits their ability to detect low-level signals. SPADs characterization is important to gain insight into their behavior and improve their performance for various applications. This thesis discusses the development of a portable detection probe that uses the APIX2LF chip, which contains arrays of SPADs that were produced using a 150 nm standard CMOS process. A prototype board, that includes a battery, front-end electronics, and a microcontroller acting as the interface between the sensor and the PC was developed and tested using a beta-emitting source. Additionally, custom firmware was designed for the microcontroller and an automatic data acquisition framework was developed for the characterization of the DCR of six APIX2LF chips at different bias voltages and temperatures.This thesis discusses the development of a portable detection probe that uses the APIX2LF chip, which contains arrays of SPADs that were produced using a 150 nm standard CMOS process. A prototype board, that includes a battery, front-end electronics, and a microcontroller acting as the interface between the sensor and the PC was developed and tested using a beta-emitting source. Additionally, custom firmware was designed for the microcontroller and an automatic data acquisition framework was developed for the characterization of the DCR of six APIX2LF chips at different bias voltages and temperatures

    Design and analysis of highspeed electronics for electro optical payload of small satellites

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    With the increase in the resolution of the Earth observation satellites, the cameras on these satellites require more detectors to fulfil the swath need and also the image sensors have to operate at a very high-speed with the sensor electronics requiring faster clock rates and larger bandwidth. The sensor data handler has to transfer a large amount of data to the spacecraft in real time incorporating the outcomes of the signal integrity and power integrity analysis in the design. High-speed analysis is an important consideration for high resolution cameras and is often performed on the satellites. This research work aims towards presenting the design and analysis of high-speed electronics for small Earth observation satellites. A methodology will be defined for the designing of high-speed electronics that will involve both the pre-layout and post-layout designs for signal and power integrity analysis. The proposed research work also provides the pre-layout and post-layout signal integrity analysis of the high-speed electronics and interfaces and it will also validate the signal integrity performance of the module by comparing it with standard performance parameters. Similarly, we will perform a pre-layout and post-layout power integrity analysis of the high-speed electronics and interfaces and its effects on the power lines and power planes

    Design and Advanced Model Predictive Control of Wide Bandgap Based Power Converters

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    The field of power electronics (PE) is experiencing a revolution by harnessing the superior technical characteristics of wide-band gap (WBG) materials, namely Silicone Carbide (SiC) and Gallium Nitride (GaN). Semiconductor devices devised using WBG materials enable high temperature operation at reduced footprint, offer higher blocking voltages, and operate at much higher switching frequencies compared to conventional Silicon (Si) based counterpart. These characteristics are highly desirable as they allow converter designs for challenging applications such as more-electric-aircraft (MEA), electric vehicle (EV) power train, and the like. This dissertation presents designs of a WBG based power converters for a 1 MW, 1 MHz ultra-fast offboard EV charger, and 250 kW integrated modular motor drive (IMMD) for a MEA application. The goal of these designs is to demonstrate the superior power density and efficiency that are achievable by leveraging the power of SiC and GaN semiconductors. Ultra-fast EV charging is expected to alleviate the challenge of range anxiety , which is currently hindering the mass adoption of EVs in automotive market. The power converter design presented in the dissertation utilizes SiC MOSFETs embedded in a topology that is a modification of the conventional three-level (3L) active neutral-point clamped (ANPC) converter. A novel phase-shifted modulation scheme presented alongside the design allows converter operation at switching frequency of 1 MHz, thereby miniaturizing the grid-side filter to enhance the power density. IMMDs combine the power electronic drive and the electric machine into a single unit, and thus is an efficient solution to realize the electrification of aircraft. The IMMD design presented in the dissertation uses GaN devices embedded in a stacked modular full-bridge converter topology to individually drive each of the motor coils. Various issues and solutions, pertaining to paralleling of GaN devices to meet the high current requirements are also addressed in the thesis. Experimental prototypes of the SiC ultra-fast EV charger and GaN IMMD were built, and the results confirm the efficacy of the proposed designs. Model predictive control (MPC) is a nonlinear control technique that has been widely investigated for various power electronic applications in the past decade. MPC exploits the discrete nature of power converters to make control decisions using a cost function. The controller offers various advantages over, e.g., linear PI controllers in terms of fast dynamic response, identical performance at a reduced switching frequency, and ease of applicability to MIMO applications. This dissertation also investigates MPC for key power electronic applications, such as, grid-tied VSC with an LCL filter and multilevel VSI with an LC filter. By implementing high performance MPC controllers on WBG based power converters, it is possible to formulate designs capable of fast dynamic tracking, high power operation at reduced THD, and increased power density

    Running Shoe Pedometer

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    Running shoe pedometer aims to solve the issue of worn out running shoes. It can be difficult to know just how many miles you have run in your shoes and when a new pair is needed. Running in old shoes and worn out shoes is heavily linked to injury. My proposed project is a device that is powered by the compressive forces on the shoes soles that counts the number of steps the wearer takes using a microcontroller. Then, when the shoe reaches milestone that indicate it has been used 75% 90% and 100% of its expected life, it will output the information to the user. In order to output the wear life of the shoes to the user, a series of color changing chemical reactions will be used. These reactions will most likely be acid/base with some type of indicator or an electrochromic material. These color changes will allow the user to see that their shoes are worn out. The device should be extremely low cost so that it can be built into a running shoe and disposed of when the shoe is worn out

    Modeling and Design of High-Performance DC-DC Converters

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    The goal of the research that was pursued during this PhD is to eventually facilitate the development of high-performance, fast-switching DC-DC converters. High-switching frequency in switching mode power supplies (SMPS) can be exploited by reducing the output voltage ripple for the same size of passives (mainly inductors and capacitors) and improve overall system performance by providing a voltage supply with less unwanted harmonics to the subsystems that they support. The opposite side of the trade-off is also attractive for designers as the same amount of ripple can be achieved with smaller values of inductance and/or capacitance which can result in a physically smaller and potentially cheaper end product. Another benefit is that the spectrum of the resulting switching noise is shifted to higher frequencies which in turn allows designers to push the corner frequency of the control loop of the system higher without the switching noise affecting the behavior of the system. This in turn, is translated to a system capable of responding faster to strong transients that are common in modern systems that may contain microprocessors or other electronics that tend to consume power in bursts and may even require the use of features like dynamic voltage scaling to minimize the overall consumption of the system. While the analysis of the open loop behavior of a DC-DC converter is relatively straightforward, it is of limited usefulness as they almost always operate in closed loop and therefore can suffer from degraded stability. Therefore, it is important to have a way to simulate their closed loop behavior in the most efficient manner possible. The first chapter is dedicated to a library of technology-agnostic high-level models that can be used to improve the efficiency of transient simulations without sacrificing the ability to model and localize the different losses. This work also focuses further in fixed-frequency converters that employ Peak Current Mode Control (PCM) schemes. PCM schemes are frequently used due to their simple implementation and their ability to respond quickly to line transients since any change of the battery voltage is reflected in the slope of the rising inductor current which in turn is monitored by a fast internal control loop that is closed with the help of a current sensor. Most existing models for current sensors assume that they behave in an ideal manner with infinite bandwidth and ideal constant gain. These assumptions tend to be in significant error as the minimum on-time of the sensor and therefore the settling time requirements of the sensor are reduced. Some sensing architectures, like the ones that approximate the inductor current with the high-side switch current, can be even more complex to analyze as they require the use of extended masking time to prevent spike currents caused by the switch commutation to be injected to the output of the sensor and therefore the signal processing blocks of the control loop. In order to solve this issue, this work also proposes a current sensor model that is compatible with time averaged models of DC-DC converters and is able to predict the effects of static and transient non-idealities of the block on the behavior of a PCM DC-DC converter. Lastly, this work proposes a new 40 V, 6 A, fully-integrated, high-side current sensing circuit with a response time of 51 . The proposed sensor is able to achieve this performance with the help of a feedback resistance emulation technique that prevents the sensor from debiasing during its masking phase which tends to extend the response time of similar fully integrated sensors

    Integrated Electronics for Wireless Imaging Microsystems with CMUT Arrays

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    Integration of transducer arrays with interface electronics in the form of single-chip CMUT-on-CMOS has emerged into the field of medical ultrasound imaging and is transforming this field. It has already been used in several commercial products such as handheld full-body imagers and it is being implemented by commercial and academic groups for Intravascular Ultrasound and Intracardiac Echocardiography. However, large attenuation of ultrasonic waves transmitted through the skull has prevented ultrasound imaging of the brain. This research is a prime step toward implantable wireless microsystems that use ultrasound to image the brain by bypassing the skull. These microsystems offer autonomous scanning (beam steering and focusing) of the brain and transferring data out of the brain for further processing and image reconstruction. The objective of the presented research is to develop building blocks of an integrated electronics architecture for CMUT based wireless ultrasound imaging systems while providing a fundamental study on interfacing CMUT arrays with their associated integrated electronics in terms of electrical power transfer and acoustic reflection which would potentially lead to more efficient and high-performance systems. A fully wireless architecture for ultrasound imaging is demonstrated for the first time. An on-chip programmable transmit (TX) beamformer enables phased array focusing and steering of ultrasound waves in the transmit mode while its on-chip bandpass noise shaping digitizer followed by an ultra-wideband (UWB) uplink transmitter minimizes the effect of path loss on the transmitted image data out of the brain. A single-chip application-specific integrated circuit (ASIC) is de- signed to realize the wireless architecture and interface with array elements, each of which includes a transceiver (TRX) front-end with a high-voltage (HV) pulser, a high-voltage T/R switch, and a low-noise amplifier (LNA). Novel design techniques are implemented in the system to enhance the performance of its building blocks. Apart from imaging capability, the implantable wireless microsystems can include a pressure sensing readout to measure intracranial pressure. To do so, a power-efficient readout for pressure sensing is presented. It uses pseudo-pseudo differential readout topology to cut down the static power consumption of the sensor for further power savings in wireless microsystems. In addition, the effect of matching and electrical termination on CMUT array elements is explored leading to new interface structures to improve bandwidth and sensitivity of CMUT arrays in different operation regions. Comprehensive analysis, modeling, and simulation methodologies are presented for further investigation.Ph.D

    Multi-Modal Wireless Flexible Gel-Free Sensors with Edge Deep Learning for Detecting and Alerting Freezing of Gait in Parkinson's Patients

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    Freezing of gait (FoG) is a debilitating symptom of Parkinson's disease (PD). This work develops flexible wearable sensors that can detect FoG and alert patients and companions to help prevent falls. FoG is detected on the sensors using a deep learning (DL) model with multi-modal sensory inputs collected from distributed wireless sensors. Two types of wireless sensors are developed, including: (1) a C-shape central node placed around the patient's ears, which collects electroencephalogram (EEG), detects FoG using an on-device DL model, and generates auditory alerts when FoG is detected; (2) a stretchable patch-type sensor attached to the patient's legs, which collects electromyography (EMG) and movement information from accelerometers. The patch-type sensors wirelessly send collected data to the central node through low-power ultra-wideband (UWB) transceivers. All sensors are fabricated on flexible printed circuit boards. Adhesive gel-free acetylene carbon black and polydimethylsiloxane electrodes are fabricated on the flexible substrate to allow conformal wear over the long term. Custom integrated circuits (IC) are developed in 180 nm CMOS technology and used in both types of sensors for signal acquisition, digitization, and wireless communication. A novel lightweight DL model is trained using multi-modal sensory data. The inference of the DL model is performed on a low-power microcontroller in the central node. The DL model achieves a high detection sensitivity of 0.81 and a specificity of 0.88. The developed wearable sensors are ready for clinical experiments and hold great promise in improving the quality of life of patients with PD. The proposed design methodologies can be used in wearable medical devices for the monitoring and treatment of a wide range of neurodegenerative diseases

    Mach-Zehnder Modulator Driver Designs in 28 nm CMOS Technology for Coherent Optical Systems

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    Since the beginning of the Internet, the number of connected devices has experienced an exponential growth. While increasing in users number, also a huge number of services and applications have been made available through the network. The forecasts tell us that we are still at the beginning of this journey, even if the numbers are already extremely high. In order to satisfy these demands, always more capable networks have been developed. Optical links have been proven to be the best candidates for long reach backbone connections, given the low losses introduced. The final target of a link is to deliver the highest amount of data for a given bit error rate (BER). So, coherent modulations move towards this direction, providing better spectral efficiency compared to other schemes. Quadrature Phase Shift Keying (QPSK) and Quadrature Amplitude Modulation (QAM) can be exploited, but linearity and phase accuracy become crucial both for the electrical and optical portion of the system. Electro-optical modulators (EOM) are used to combine laser beams with different amplitudes and phases, to provide such complex schemes. CMOS technology is not so widely used in coherent applications, mainly because of the higher break-down voltage and gm/ID of BiCMOS devices. Yet CMOS has some interesting features, such as scalability and integration between analog and digital circuits, that might result in a reduction of the overall system costs. Furthermore, in the latest technology nodes, p- and n-type MOS transistors have very similar performance, making available complementary structures which can compensate the poor MOS transconductance efficiency. The required electrical signal at the EOM input should be large enough to fully steer the light phase, linear to preserve phase and amplitude, and broad-band to achieve the highest bitrate. This thesis reports two CMOS designs. A first driver has been designed, fabricated and tested. The proposed structure is a four stages chain, with two gain blocks, a pre-driver and a main driver. To reach good linearity, cascoded pseudo-differential structures have been implemented, apart for the pre-driver. The cascode transistor allows to bias the common source (CS) in triode region, resulting in a linear voltage-to-current conversion. Working in triode region means a lower transistor gm, and a strong dependence between transconductance and drain-to-source voltage. In this way gain variability can be introduced changing the cascode voltage. The pre-driver is a pn source follower, which feeds the main driver without impairing the gain at high frequency. This solution is capable to provide an output voltage of 1.5 Vpp-diff, with a total harmonic distortion (THD) lower than 1.8%. The gain variation over frequency is always below 3 dB up to 58 GHz. A second design has been realized and sent for fabrication, but at the moment of this dissertation not yet available. The first stage of this design is a transconductor, which provides voltage-to-current conversion. Since the involved amplitude is small, the amount of distortion introduced (which is proportional to the voltage swing) is very low. Part of the gain is provided in current domain through a current mirror-like structure, allowing, at least in principle, self cancellation of spurious components. Then, the output current-to-voltage conversion is realized with a closed-loop transimpedance amplifier (TIA). This solution intends to exploit loop gain (Gloop) in order to reduce the distortion. At the same time, a loop designed with a phase margin (PM) lower than 60°, results in high frequency peak for the closed-loop transfer function. The simulated THD for a 1.5 Vpp-diff output signal is frequency dependent, and it ranges from 0.3% at 1 GHz, up to 2% at 9 GHz. Ripples in the transfer function are below 3 dB up to 51 GHz, for all the gain configurations
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