Single-Chip Isolated DC-DC Converter with Self-Tuned Maximum Power Transfer Frequency

abstract: There is an increasing demand for fully integrated point-of-load (POL) isolated DC-DC converters that can provide an isolation barrier between the primary and the secondary side, while delivering a low ripple, low noise regulated voltage at their isolated sides to a high dynamic range, sensitive mixed signal devices, such as sensors, current-shunt-monitors and ADCs. For these applications, smaller system size and integration level is important because the whole system may need to fit to limited space. Traditional methods for providing isolated power are discrete solutions using bulky transformers. Miniaturization of isolated POL regulators is becoming highly desirable for low power applications. A fully integrated, low noise isolated point-of-load DC-DC converter for supply regulation of high dynamic range analog and mixed signal sensor signal-chains is presented. The isolated DC-DC converter utilizes an integrated planar air-core micro-transformer as a coupled resonator and isolation barrier and enables direct connection of low-voltage mixed signal circuits to higher supply rails. The air core transformer is driven at its primary resonant frequency of 100 MHz to achieve maximum power transfer. A mixed-signal perturb-and-observe based frequency search algorithm is developed to improve maximum power transfer efficiency by 60% across the isolation barrier compared to fixed driving frequency method. The isolated converter’s output ripple is reduced by utilizing spread spectrum clocking in the driver. An isolated PMOS LDO in the secondary side is used to suppress switching noise and ripple by 21dB. Conducted and radiated EMI distribution on the IC is measured by a set of integrated ring oscillator based noise sensors with -68dBm noise sensitivity. The proposed isolated converter achieves highest level of integration with respect to earlier reported integrated isolated converters, while providing 50V on-chip junction isolation without the need for extra silicon post-processing steps.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

An agile supply modulator with improved transient performance for power efficient linear amplifier employing envelope tracking techniques

This article presents an agile supply modulator with optimal transient performance that includes improvement in rise time, overshoot and settling time for the envelope tracking supply in linear power amplifiers. For this purpose, we propose an on-demand current source module: the bang-bang transient performance enhancer (BBTPE). Its objective is to follow fast variations in input signals with reduced overshoot and settling time without deteriorating the steady-state performance of the buck regulator. The proposed approach enables fast system response through the BBTPE and an accurate steady-state output response through a low switching ripple and power efficient dynamic buck regulator. Fast output response with the help of the added module induces a slower rise of inductor current in the buck converter that further helps the proposed system to reduce both overshoot and settling time. This article also introduces an efficient selective tracking of envelope signal for linear PAs. To demonstrate the feasibility of the proposed solution, extensive simulations and experimental results from a discrete system are reported. The proposed supply modulator shows 80% improvement in rise time along with 60% reduction in both overshoot and settling time compared to the conventional dynamic buck regulator-based solution. Experimental results using the LTE 16-QAM 5 MHz standard shows improvement of 7.68 dB and 65.1% in adjacent channel power ratio (ACPR) and error vector magnitude (EVM), respectively.Peer ReviewedPostprint (author's final draft

Asynchronous Data Processing Platforms for Energy Efficiency, Performance, and Scalability

The global technology revolution is changing the integrated circuit industry from the one driven by performance to the one driven by energy, scalability and more-balanced design goals. Without clock-related issues, asynchronous circuits enable further design tradeoffs and in operation adaptive adjustments for energy efficiency. This dissertation work presents the design methodology of the asynchronous circuit using NULL Convention Logic (NCL) and multi-threshold CMOS techniques for energy efficiency and throughput optimization in digital signal processing circuits. Parallel homogeneous and heterogeneous platforms implementing adaptive dynamic voltage scaling (DVS) based on the observation of system fullness and workload prediction are developed for balanced control of the performance and energy efficiency. Datapath control logic with NULL Cycle Reduction (NCR) and arbitration network are incorporated in the heterogeneous platform for large scale cascading. The platforms have been integrated with the data processing units using the IBM 130 nm 8RF process and fabricated using the MITLL 90 nm FDSOI process. Simulation and physical testing results show the energy efficiency advantage of asynchronous designs and the effective of the adaptive DVS mechanism in balancing the energy and performance in both platforms

High Radiation Resistant DC-DC Converter Regulators for use in Magnetic fields for LHC High Luminosity Silicon Trackers

For more efficient power transport to the electronics embedded inside large colliding beam detectors, we explore the feasibility of supplying higher DC voltage and using local DC-DC conversion to 1.3 V (or lower, depending upon on the lithography of the embedded electronics) using switch mode regulators located very close to the front end electronics. These devices will be exposed to high radiation and high magnetic fields, 10 – 100 Mrads and 2 - 4 Tesla at the SLHC

Cryogenic Operation of sCMOS Image Sensors

Scientific CMOS image sensors have lower read noise and dark current than charge coupled devices. They are also uniquely qualified for operation at cryogenic temperatures due to their MOSFET pixel architecture. This paper follows the design of a cryogenic imaging system to be used as a star tracking rocket attitude regulation system. The detector was proven to retain almost all its sensitivity at cryogenic temperatures with acceptably low read noise. Once the star tracker successfully maintains rocket attitude during the flight of the CIBER-2 experiment, the technology readiness level of scientific CMOS detectors will advance enough that they could see potential applications in deep space imaging experiments

Analog Block Evaluation with BIST Instruments

The demands for quality and for the ability to compete in the market make it necessary not only to facilitate the testing of analog circuits but also to make them more efficient. With the increase in systems complexity and level of integration, the process of testing analog circuits has become difficult and expensive. This dissertation, proposed by Synopsys Portugal, aims to perform a study on analog Built-In Self-Test (BIST) and implement a simple analog BIST system that is capable of testing a voltage regulator and an oscillator on specifics parameters. In the regulator, the parameters to test are: Over and Under Voltage, Settling Time and Voltage Ripple. In the oscillator the parameters to test are: Frequency Drift, Settling Time and Duty-Cycle Distortion. This methodology allows for self-test operations and, thus, reduces complexity and cost associated with performing analog circuit tests. It makes it possible to test the circuits periodically throughout its lifetime and also monitors some analog parameters in real-time

A precise 90º quadrature OTA-C oscillator tunable in the 50-130-MHz range

We present a very-large-scale integration continuous-time sinusoidal operational transconductance amplifiers quadrature oscillator fabricated in a standard double-poly 0.8-μm CMOS process. The oscillator is tunable in the frequency range from 50 to 130 MHz. The two phases produced by the oscillator show a low-quadrature phase error. A novel current-mode amplitude control scheme is developed that allows for very small amplitudes. Stability of the amplitude control loop is studied as well as design considerations for its optimization. Experimental results are provided