A design for testability study on a high performance automatic gain control circuit.

A comprehensive testability study on a commercial automatic gain control circuit is presented which aims to identify design for testability (DfT) modifications to both reduce production test cost and improve test quality. A fault simulation strategy based on layout extracted faults has been used to support the study. The paper proposes a number of DfT modifications at the layout, schematic and system levels together with testability. Guidelines that may well have generic applicability. Proposals for using the modifications to achieve partial self test are made and estimates of achieved fault coverage and quality levels presente

Analogue integrated circuits design-for-testability flow oriented onto OBIST strategy

© Kaunas University of Technology. Oscillation Built-In Self-Test (OBIST) strategy allows to avoid the using complex, expensive generators of input test signals during testing, and uses the oscillation frequency generated at the output of the circuit after reconfiguring into oscillator as a controlled parameter. There configuration subcircuit forms an oscillator from the original circuit in the test mode and requires an additional but insignificant area of the chip, especially against the background of stable increasing the scale of integration for the state-of-the-art integrated technologies. Selection of the efficient type of reconfiguration the original circuit into oscillator and implementation of corresponding test circuitry are the most important tasks, which, as rule, are solved nowadays based on experience of designers without automation and therefore restrict to wide use of the OBIST concept. The paper is mainly focused on the task of design-for-testability (DFT) automation with emphasis on the OBIST strategy for analog integrated circuits (IC). The design procedures according to DFT flow are proposed. Three possible structural solutions for reconfiguration of original circuit into an oscillator are considered. The necessary conditions for stability analysis of reconfigured circuit are presented. The stage of a numerical estimating the transient time before the steady-state operation after reconfiguration of original circuit into an oscillator ensuring definition of the start time point for correct calculating the oscillation frequency is proposed. The set of rules for each structural solution for reconfiguration is prepared as the formal procedures, which can support the automation during the DFT flow. The efficiency of the proposed DFT flow is demonstrated for analog circuits, for which the reconfiguration subcircuits were obtained in an automated way during design-for-testability, as well as the fault simulation has been performed. The experimental results for all cases showed the adequacy of oscillation frequency for revealing both catastrophic and parametric faults. Fault coverage for considered set of faults has consisted up to 100%

Low-Power and Programmable Analog Circuitry for Wireless Sensors

Embedding networks of secure, wirelessly-connected sensors and actuators will help us to conscientiously manage our local and extended environments. One major challenge for this vision is to create networks of wireless sensor devices that provide maximal knowledge of their environment while using only the energy that is available within that environment. In this work, it is argued that the energy constraints in wireless sensor design are best addressed by incorporating analog signal processors. The low power-consumption of an analog signal processor allows persistent monitoring of multiple sensors while the device\u27s analog-to-digital converter, microcontroller, and transceiver are all in sleep mode. This dissertation describes the development of analog signal processing integrated circuits for wireless sensor networks. Specific technology problems that are addressed include reconfigurable processing architectures for low-power sensing applications, as well as the development of reprogrammable biasing for analog circuits

OSCILLATION-BASED TESTING METHOD FOR DETECTING SWITCH FAULTS IN HIGH-Q SC BIQUAD FILTERS

Testing switched capacitor circuits is a challenge due to the diversity of the possible faults. A special problem encountered is the synthesis of the test signal that will control and will make the fault-effect observable at the test point. The oscillation based method which was adopted for testing in these proceedings resolves that important issue by his nature. Here we discuss the properties of the method and the conditions to be fulfilled in order to implement it in the right way. To achieve that we resolved the problem of synthesis of the positive feed-back circuit and the choice of a proper model of the operational amplifier. In that way a realistic foundation to the testing process was generated. A second order notch cell was chosen as a case-study. Fault dictionaries were developed related to the catastrophic faults of the switches used within the cell. The results reported here are a continuation of our previous work and are complimentary to some other already published

Analog Reconfigurable Circuits

The aim of this paper is to present an overview of a new branch of analog electronics represented by analog reconfigurable circuits. The reconfiguration of analog circuits has been known and used since the beginnings of electronics, but the universal reconfigurable circuits called Field Programmable Analog Arrays (FPAA) have been developed over the last two decades. This paper presents the classification of analog circuit reconfiguration, examples of FPAA solutions obtained as academic projects and commercially available ones, as well as some application examples of the dynamic reconfiguration of FPAA.